Apparatuses and methods for incorporating a border within an image

• US 20050270310A1
• Filed: 06/03/2004
• Published: 12/08/2005
• Est. Priority Date: 06/03/2004
• Status: Abandoned Application

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Jeffrey, Eric
• Application Number:
  US10/859,654
• Publication Number:
  US 20050270310A1
• Time in Patent Office: Days
• US Class Current: 345/641
• CPC Class Codes: G06T 11/60 Editing figures and text; Combining figures or text

Abstract

A hardware implemented method for incorporating a border region within an image region is provided. In this hardware implemented method, a main image fetching circuit is accessed to determine a relative position of a pixel within the image region. Subsequently, an image pixel or a border pixel is fetched dependent upon the relative position of the pixel. An apparatus and display controllers for incorporating the border region within the image region also are described.

Claims

1. A hardware implemented method for incorporating a border region within an image region, comprising the method operations of:

computing a relative position of a pixel within the image region;

comparing the relative position of the pixel with a border region width to determine whether the pixel is located in the border region;

fetching a border pixel from a border memory if the relative position of the pixel is in the border region; and

fetching an image pixel from a main memory if the relative position of the pixel is in the image region.

2. The hardware implemented method of claim 1, further comprising:

outputting the fetched pixel to a display.

3. The hardware implemented method of claim 1, wherein the method operation of fetching the border pixel from the border memory if the relative position of the pixel is in the border region includes,

fetching the image pixel from the main memory if the border pixel is transparent;

and

outputting the image pixel to a display.

4. The hardware implemented method of claim 1, wherein the method operation of fetching the border pixel from the border memory if the relative position of the pixel is in the border region includes,

fetching the image pixel from the main memory;

selecting the border pixel for display if the border pixel is not transparent; and

selecting the image pixel for display if the border pixel is transparent.

5. The hardware implemented method of claim 1, wherein the method operation of computing the relative position of the pixel within the image region includes,

tracking the pixel along a horizontal position and along a vertical position.

6. The hardware implemented method of claim 5, wherein the border region width includes a horizontal border width and a vertical border width.

7. The hardware implemented method of claim 6, wherein the method operation of comparing the relative position of the pixel with the border region width includes,

comparing the horizontal position with the horizontal border width;

and

comparing the vertical position with the vertical border width.

8. A display controller for incorporating a border region within an image region, comprising:

a main memory configured to store an image pixel;

a border memory configured to store a border pixel;

a memory controller configured to fetch the image pixel from the main memory and to fetch the border pixel from the border memory; and

a main image fetching circuit in communication with the memory controller, the main image fetching circuit including,

logic for computing a relative position of a pixel within the image region,

logic for fetching the border pixel from the border memory if the relative position of the pixel is in the border region, and

logic for fetching the image pixel from the main memory if the relative position of the pixel is in the image region.

9. The display controller of claim 8, wherein the main image fetching circuit further includes,

logic for comparing the relative position of the pixel with a border region width to determine whether the pixel is located in the border region.

10. The display controller of claim 8, further comprising:

a display interface in communication with the main image fetching circuit, the display interface being configured to interface with a display.

11. The display controller of claim 8, wherein each of the main and border memories is selected from the group consisting of a static random access memory (SRAM) and a dynamic random access memory (DRAM).

12. An apparatus for incorporating a border region within an image region, comprising:

a display controller including,

circuitry for accessing a main image fetching circuit to determine a relative position of a pixel within the image region, and

circuitry for fetching an image pixel or a border pixel dependent upon the relative position of the pixel;

a central processing unit (CPU) in communication with the display controller; and

a display in communication with the display controller, the display enabling the display of the image region.

13. The apparatus of claim 12, further comprising:

a memory in communication with the CPU.

14. The apparatus of claim 12, wherein the display is selected from the group consisting of a liquid crystal display (LCD), a thin-film transistor (TFT) display, a cathode ray tube (CRT) monitor, and a television.

15. A hardware implemented method for incorporating a border region within an image region, comprising the method operations of:

accessing a main image fetching circuit to determine a relative position of a pixel within the image region; and

fetching an image pixel or a border pixel dependent upon the relative position of the pixel.

16. The hardware implemented method of claim 15, further comprising:

incrementing a counter of the main image fetching circuit to determine a current relative position of a next pixel within the image region; and

fetching one of the image pixel or the border pixel dependent upon the current relative position of the next pixel.

17. The hardware implemented method of claim 16, wherein the method operation of incrementing the counter of the main image fetching circuit includes,

incrementing a horizontal counter when transitioning to a next pixel column within the image region;

and

incrementing a vertical counter when transitioning to a next pixel row within the image region.

18. The hardware implemented method of claim 15, further comprising:

storing the image pixels; and

storing the border pixels, the border pixels representing a portion of an area of the image pixels.

19. The hardware implemented method of claim 15, wherein the method operation of fetching the image pixel or the border pixel dependent upon the relative position of the pixel includes,

fetching the border pixel from a border memory if the relative position of the pixel is in the border region;

and

fetching the image pixel from a main memory if the relative position of the pixel is in the image region.

20. The hardware implemented method of claim 19, wherein the method operation of fetching the border pixel from the border memory if the relative position of the pixel is in the border region includes,

fetching the image pixel from the main memory if the border pixel is transparent;

and

outputting the image pixel to a display.

21. The hardware implemented method of claim 19, wherein the method operation of fetching the border pixel from the border memory if the relative position of the pixel is in the border region includes,

fetching the image pixel from the main memory;

selecting the border pixel for display if the border pixel is not transparent; and

selecting the image pixel for display if the border pixel is transparent.