Erase verify for non-volatile memory
First Claim
1. A method for erase verifying a non-volatile memory cell, the method comprising:
- generating a first reference current;
generating a second reference current; and
comparing a bit line current from a column coupled to the non-volatile memory cell with the first reference current and the second reference current.
8 Assignments
0 Petitions
Accused Products
Abstract
A memory device verify system determines a state of memory cells in a memory. The memory includes a memory array having a plurality of memory cells coupled to bit lines. A verify circuit is coupled to the bit lines to determine if memory cells have a erase level that is within predetermined upper and lower limits. The verify circuit can include first and second comparators. In one embodiment, the first comparator is used to compare a bit line current with an upper first reference current. The second comparator is used to compare a bit line current with a lower second reference current. The comparator circuit is not limited to reference currents, but can use reference voltages to compare to a bit line voltage. The verify circuit, therefore, eliminates the need for separate bit line leakage testing to identify over-erased memory cells.
-
Citations
20 Claims
-
1. A method for erase verifying a non-volatile memory cell, the method comprising:
-
generating a first reference current;
generating a second reference current; and
comparing a bit line current from a column coupled to the non-volatile memory cell with the first reference current and the second reference current. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A method for erase verifying a non-volatile memory cell, the method comprising:
-
generating a first reference voltage;
generating a second reference voltage; and
comparing a bit line voltage from a column coupled to the non-volatile memory cell with the first reference voltage and the second reference voltage. - View Dependent Claims (8, 9)
-
-
10. A method for erase verifying a non-volatile memory cell, the method comprising:
-
receiving a first reference current;
converting the first reference current to a first reference voltage;
receiving a second reference current;
converting the second reference current to a second reference voltage;
converting a bit line current, from the memory cell, to a bit line voltage;
comparing the bit line voltage with the first reference voltage and the second reference voltage; and
identifying if the memory cell is over-erased, under-erased or erased in response to the comparison. - View Dependent Claims (11, 12, 13)
-
-
14. A method for erase verifying a non-volatile memory cell, the method comprising:
-
receiving a reference current;
converting the reference current to a first reference voltage and a second reference voltage;
converting a bit line current, from the memory cell, to a bit line voltage;
comparing the bit line voltage with the first reference voltage and the second reference voltage; and
identifying if the memory cell is over-erased, under-erased or erased in response to the comparison.
-
-
15. A method for erase verifying a non-volatile memory cell, the method comprising:
-
generating a first reference current;
generating a second reference current;
simultaneously comparing a bit line current from a column coupled to the non-volatile memory cell with the first reference current and the second reference current;
identifying if the memory cell is over-erased, under-erased or erased; and
correcting the memory cell if it is over-erased or under-erased.
-
-
16. A method for erase verifying a non-volatile memory cell comprising:
-
generating a first reference voltage;
generating a second reference voltage;
simultaneously comparing a bit line voltage from a column coupled to the non-volatile memory cell with the first reference voltage and the second reference voltage;
identifying if the memory cell is over-erased, under erased, or erased; and
correcting the memory cell if it is over-erased or under-erased.
-
-
17. A method for erasing a flash memory device, the method comprising:
-
pre-programming flash memory cells;
applying erase pulses to the flash memory cells and performing an erase verification of the flash memory cells; and
healing over-erased ones of the flash memory cells without performing a separate leakage detection operation. - View Dependent Claims (18, 19)
-
-
20. A method for erasing a flash memory device, the method comprising:
-
pre-programming flash memory cells;
applying erase pulses to the flash memory cells; and
performing an erase verification of the flash memory cells that includes healing of over-erased ones of the flash memory cells.
-
Specification