Method of manufacturing metal-oxide-semiconductor transistor
First Claim
1. A method of manufacturing a metal-oxide-semiconductor (MOS) transistor, comprising the steps of:
- providing a substrate having a gate structure thereon;
forming a first spacer on the sidewall of the gate structure;
performing a pre-amorphization implantation to amorphize a portion of the substrate;
forming a doped source/drain extension region in the substrate on each side of the first spacer;
forming a second spacer on the sidewall of the first spacer;
forming a doped source/drain region in the substrate on each side of the second spacer;
performing a solid phase epitaxial process to re-crystallize the amorphized portion of the substrate and activate the doped source/drain extension region and the doped source/drain region to form a source/drain terminal; and
performing a post-annealing process, wherein the annealing temperature in the post-annealing operation is higher than the operating temperature in the solid phase epitaxial process.
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Abstract
A method of manufacturing a MOS transistor is provided. A substrate having a gate structure thereon is provided. A first spacer is formed on the sidewall of the gate structure. A pre-amorphization implantation is carried out to amorphize a portion of the substrate. A doped source/drain extension region is formed in the substrate on each side of the first spacer. A second spacer is formed on the sidewall of the first spacer. A doped source/drain region is formed in the substrate on each side of the second spacer. Thereafter, a solid phase epitaxial process is carried out to re-crystallize the amorphized portion of the substrate and activate the doped source/drain extension region and the doped source/drain region to form a source/drain terminal. Finally, a post-annealing operation is performed.
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Citations
6 Claims
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1. A method of manufacturing a metal-oxide-semiconductor (MOS) transistor, comprising the steps of:
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providing a substrate having a gate structure thereon;
forming a first spacer on the sidewall of the gate structure;
performing a pre-amorphization implantation to amorphize a portion of the substrate;
forming a doped source/drain extension region in the substrate on each side of the first spacer;
forming a second spacer on the sidewall of the first spacer;
forming a doped source/drain region in the substrate on each side of the second spacer;
performing a solid phase epitaxial process to re-crystallize the amorphized portion of the substrate and activate the doped source/drain extension region and the doped source/drain region to form a source/drain terminal; and
performing a post-annealing process, wherein the annealing temperature in the post-annealing operation is higher than the operating temperature in the solid phase epitaxial process. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification