Automated and customizable generation of efficient test programs for multiple electrical test equipment platforms

• US 20050273685A1
• Filed: 06/08/2004
• Published: 12/08/2005
• Est. Priority Date: 06/08/2004
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Sachdev, Sanjay, Winstead, Charles H.
• Application Number:
  US10/863,084
• Publication Number:
  US 20050273685A1
• Time in Patent Office: Days
• US Class Current: 714/742
• CPC Class Codes: G06F 11/263 Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers

Abstract

Automating techniques provide a way to create efficient test programs for characterizing semiconductor devices, such as those on a silicon die sample. Typically, test program creation is a drawn out process involving data entry for every test to be run as part of the test program. The described techniques improve test algorithm selection and automatically populate the test algorithm data in creating the test program. The automatic population may occur by accessing test structure, header, and test algorithm catalogs. The test structure catalog contains physical data for the test program, while the header catalog contains global parameter values. The test algorithm catalog has all of the various test algorithms that may be run in a given test, where these test algorithms may be in a template form and specific to any number of different test language abstractions. After test program creation, a validation process is executed to determine if the test program data is valid. Invalid data may be flagged, in an example. Once validated, techniques are described for converting the validated test program into an executable form, by formatting the various test algorithm data in the test program into a form compatible with the applicable test language abstraction selected by the user or the tester.

Claims

1. A method of forming a test package for analyzing characteristics of a semiconductor sample via an electrical tester machine, the method comprising:

identifying a plurality of test algorithms, each test algorithm defining a semiconductor device test;

populating a test package with the plurality of test algorithms, wherein each test algorithm comprises parameter data fields for populating with validated parameter data values;

searching at least one catalog for the validated parameter data values; and

in response to finding at least one validated parameter data value, populating the at least one validated parameter data value into the test package.

2. The method of claim 1, wherein identifying a plurality of test algorithms comprises accessing a test algorithms catalog.

3. The method of claim 2, wherein at least two of the plurality of test algorithms define different semiconductor device tests.

4. The method of claim 2, wherein the test algorithm comprises connector parameter fields.

5. The method of claim 1, wherein the parameter fields comprise a global data field, and wherein searching the at least one catalog comprises:

searching a header catalog for a first validated global data value corresponding to the global data field.

6. The method of claim 5, further comprising:

searching a test structure catalog for a second validated global data value corresponding to the global data field; and

populating the global data field with the second validated global data value in place of the first validated global data value.

7. The method of claim 1, further comprising validating the test package.

8. The method of claim 7, wherein the test package comprises a plurality of:

parameter data values, further comprising;

comparing the plurality of parameter data values to a rules database; and

determining if the plurality of parameter data values satisfy rules of the rules database.

9. The method of claim 8, further comprising flagging any parameter data values that do not satisfy the rules of the rules database.

10. The method of claim 7, wherein the rules database includes at least one pin rule and at least one connector rule.

11. The method of claim 1, wherein the test package comprises voltage parameter data and connection parameter data.

12. The method of claim 1, wherein the test package comprises measurement parameter data and device characteristics parameter data.

13. The method of claim 1, wherein the test package is storable in a spreadsheet format.

14. The method of claim 1, wherein the test package includes at least one parameter field comprising a global data tag.

15. The method of claim 1, further comprising converting the test package to a test program file executable on the tester equipment.

16. The method of claim 15, comprising:

accessing one of the plurality of test algorithms in the test package;

accessing a first test code template; and

populating the first test code template with parameter data from the test algorithm.

17. The method of claim 16, comprising:

accessing another of the plurality of test algorithms in the test package;

accessing a second test code template; and

populating the second test code template with parameter data from the test algorithm.

18. A method of forming a test program for analyzing characteristics of a semiconductor sample via an electrical tester machine, the method comprising:

creating a test package having a plurality of test algorithms, wherein one of the plurality of test algorithms corresponds to a first test code template and wherein at least one other of the plurality of test algorithms corresponds to a second test code template;

different than the first test code template;

populating the test package with parameter data values; and

validating the parameter data values.

19. The method of claim 18, further comprising converting the test package to an executable test program file.

20. The method of claim 19, further comprising:

accessing a first test code template;

populating the first code template with parameter data from the one of the plurality of test algorithms;

accessing a second test code template; and

populating the second code template with parameter data from the other of the plurality of test algorithms.

21. The method of claim 18, wherein populating the test package comprises searching a first catalog for validated parameter data values.

22. An article comprising a machine-accessible medium having stored thereon instructions that, when executed by a machine, cause the machine to:

identify a plurality of selected test algorithms, wherein each test algorithm defines a semiconductor device test;

populate a test package with the plurality of selected test algorithms;

search a catalog for validated parameter data values for populating into the test package; and

populating validated parameter data values into the test package.

23. The article of claim 22, having further instructions that, when executed by the machine, cause the machine to access a test algorithms catalog.

24. The article of claim 22, having further instructions that, when executed by the machine, cause the machine to search a catalog for validated global data values for populating into the test package.

25. The article of claim 24, wherein the test package comprise at least one global data field having a global data tag, identifying a global data value to be searched for.

26. The article of claim 22, wherein the test package comprises a plurality of parameter data values, and having further instructions that, when executed by the machine, cause the machine to:

compare the plurality of parameter data values to a rules database; and

determine if the plurality of parameter data values satisfy rules of the rules database.

27. The article of claim 26, having further instructions that, when executed by the machine, cause the machine to flag any parameter data values that do not satisfy the rules of the rules database.

28. The article of claim 22, having further instructions that, when executed by the machine, cause the machine to convert the test package to a test program file executable on a semiconductor test equipment.

29. The article of claim 28, having further instructions that, when executed by the machine, cause the machine to:

access one of the plurality of test algorithms in the test package;

access a first test code template; and

populate the first test code template with parameter data from the test algorithm.

30. The article of claim 29, having further instructions that, when executed by the machine, cause the machine to:

access another of the plurality of test algorithms in the test package;

access a second test code template; and

populate the second test code template with parameter data from the test algorithm.