Semiconductor device having inductor

• US 20050275061A1
• Filed: 10/14/2004
• Published: 12/15/2005
• Est. Priority Date: 06/11/2004
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Ohguro, Tatsuya
• Application Number:
  US10/964,805
• Publication Number:
  US 20050275061A1
• Time in Patent Office: Days
• US Class Current: 257/531
• CPC Class Codes: H01F 2017/008 Electric or magnetic shielding of printed inductances
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/6835 used as a support during build up manufacturing of active devices
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/29198 with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/8385 using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06572 Auxiliary carrier between devices, the carrier having an electrical connection structure
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/16 : the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01025 : Manganese [Mn]
• CPC Class Codes: H01L 2924/01026 : Iron [Fe]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01038 : Strontium [Sr]
• CPC Class Codes: H01L 2924/0104 : Zirconium [Zr]
• CPC Class Codes: H01L 2924/01041 : Niobium [Nb]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01056 : Barium [Ba]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01105 : Rare earth metals
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/0133 : Ternary Alloys
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19103 : interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
• CPC Class Codes: H01L 2924/19104 : on the semiconductor or solid-state device, i.e. passive-on-chip
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

A semiconductor device includes a first chip having an inductor, a second chip stacked on the first chip and having a conductive layer, and a first magnetic shielding layer formed between the first and second chips.

Claims

1. A semiconductor device comprising:

a first chip having an inductor;

a second chip stacked on the first chip and having a conductive layer; and

a first magnetic shielding layer formed between the first and second chips.

2. The device according to claim 1, wherein

the first chip comprises:

a semiconductor substrate having upper and lower surfaces; and

the inductor formed on the upper surface of the semiconductor substrate, and

the first magnetic shielding layer is formed on the lower surface of semiconductor substrate.

3. The device according to claim 1, further comprising a second magnetic shielding layer formed on side surfaces of the first chip.

4. The device according to claim 1, wherein a width of the first magnetic shielding layer is not less than three times an outer diameter of the inductor.

5. The device according to claim 1, wherein an area of the first magnetic shielding layer is larger than an area in which the inductor is present.

6. The device according to claim 1, wherein the first magnetic shielding layer is formed of a magnetic material.

7. The device according to claim 1, wherein the first magnetic shielding layer is formed of a material selected from the group including of Ni, Fe, Co, and a magnetic material containing at least one of Ni, Fe, and Co.

8. The device according to claim 1, wherein the first magnetic shielding layer is formed of a material selected from the group including of a ferrite-based magnetic material and permalloy-based magnetic material.

9. The device according to claim 1, wherein

the first magnetic shielding layer is formed of an alloy of Fe and Ni, and

an Fe content of the alloy is not more than 20%.

10. The device according to claim 1, wherein

the first magnetic shielding layer is formed of an alloy of Fe and Ni, and

a film thickness of the first magnetic shielding layer is less than 50 nm.

11. The device according to claim 2, wherein a film thickness of the semiconductor substrate is smaller than an outer diameter of the inductor.

12. The device according to claim 1, wherein a film thickness of the first chip is smaller than an outer diameter of the inductor.

13. The device according to claim 2, further comprising an insulating film formed between the first magnetic shielding layer and the lower surface of the semiconductor substrate, and having a film thickness of not less than 3 nm.

14. The device according to claim 1, wherein

the first chip has a buried insulating film and semiconductor layer forming an SOI substrate, and

the first magnetic shielding layer is formed on the buried insulating film.

15. The device according to claim 1, further comprising an adhesive which adheres the first and second chips, and contains a magnetic material.

16. The device according to claim 1, further comprising a second magnetic shielding layer formed on a surface of the second chip, which faces the first chip.

17. The device according to claim 1, wherein the first magnetic shielding layer is partially formed to have a gap on a lower surface of the first chip.

18. The device according to claim 17, wherein a pad of the second chip is formed in the gap.

19. The device according to claim 1, further comprising a second magnetic shielding layer formed around the inductor.

20. The device according to claim 19, wherein the second magnetic shielding layer is formed on an upper surface and side surfaces of the inductor.