Memory device capable of stable data writing
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Abstract
A memory device according to the present invention includes a memory cell array including a plurality of memory cells arranged therein, the memory cell array being divided into a plurality of regions each selectable independently of the others as an object for data writing, and further includes a plurality of current supply sections provided correspondingly to the plurality of regions, respectively. Each of the plurality of current supply sections, when a corresponding region of the plurality of regions is selected as an object for data writing, is activated to supply a data write current to the corresponding region and each of the plurality of regions includes a plurality of write select lines provided correspondingly to predetermined units of the plurality of memory cells. The plurality of write select lines are selectively supplied with the data write current from a corresponding one of the plurality of current supply sections.
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Citations
25 Claims
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1-18. -18. (canceled)
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19. A non-volatile memory device comprising:
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a plurality of memory cells;
a plurality of write current lines provided correspondingly to predetermined units of said plurality of memory cells;
a first wire connected electrically to one end sides of said plurality of write current lines;
a second wire, connected electrically to a first voltage, and connected electrically to at least one of the other end sides of said plurality of write current lines in data writing;
a current supply circuit, in said data writing, activated to connect said first wire electrically to a second voltage and to thereby supply said data write current to said first wire; and
a voltage setting circuit for, when said current supply circuit is in an inactive state, setting said first wire electrically to a third voltage different from said second voltage, wherein a difference between said first and third voltages is smaller than a difference between said first and second voltages. - View Dependent Claims (20, 21)
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22. A non-volatile memory device comprising:
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a plurality of memory cells;
a plurality of write current lines provided correspondingly to predetermined units of said plurality of memory cells;
a first wire connected electrically to one end sides of said plurality of write current lines;
a second wire, connected electrically to a first voltage, and connected electrically to at least one of the other end sides of said plurality of write current lines in data writing;
a current supply circuit, in said data writing, activated to connect said first wire electrically to a second voltage and to thereby supply said data write current to said first wire;
an address decode circuit for, in said data writing, selecting a write current line to receive supply of said data write current from said plurality of write current lines; and
a voltage setting circuit for setting said first wire electrically to a third voltage different from said second voltage during a predetermined period from the start of data writing till said data write current is supplied into said write current line selected by said address decode circuit, wherein a difference between said first and third voltages is smaller than a difference between said first and second voltages. - View Dependent Claims (23, 24, 25)
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Specification