Communication channel calibration using feedback

• US 20050276261A1
• Filed: 06/09/2004
• Published: 12/15/2005
• Est. Priority Date: 06/09/2004
• Status: Active Grant

• Current Assignee: Rambus Inc.
• Original Assignee: Rambus Inc.
• Inventors: Richardson, Wayne S., Kim, Jun, Chiu, Glenn
• Granted Patent: US 7,516,029 B2
• Time in Patent Office: Days
• US Class Current: 370/389
• CPC Class Codes: H04B 17/11 for calibration
• CPC Class Codes: H04L 2025/03802 Signalling on the reverse channel
• CPC Class Codes: H04L 25/03343 Arrangements at the transmitter end
• CPC Class Codes: H04L 5/1438 Negotiation of transmission parameters prior to communication modified according to link quality H04L1/0001

Abstract

A method for calibrating a communication channel coupling first and second components includes transmitting a data signal from the first component to the second component on the communication channel, and sensing a characteristic, such as phase, of the data signal on the second component. Information about the sensed characteristic is fed back to the first component using an auxiliary channel. An adjustable parameter, such as phase, for the transmitter is adjusted on the first component in response to the information. Also, a characteristic of a data signal received from the transmitter on the second component is sensed and used to adjust an adjustable parameter for the receiver on the first component.

Claims

1. A method for calibrating in a system including a communication channel coupled to a first component and a second component, the first component having a transmitter with an adjustable parameter, the second component having a receiver, comprising:

transmitting a data signal from the first component to the second component on the communication channel, the data signal including a sequence of data symbols representing data;

sensing on the second component a characteristic of the data signal and the data represented by the data symbols;

feeding back information about the sensed characteristic from the second component to the first component using a different communication channel; and

adjusting the adjustable parameter for the transmitter on the first component in response to the information about the sensed characteristic.

2. The method of claim 1, wherein the sensed characteristic comprises phase of the data signal relative to a reference clock on the second component.

3. The method of claim 1, wherein the sensed characteristic comprises equalization characteristics of the data signal on the second component.

4. The method of claim 1, wherein the sensed characteristic comprises amplitude of the data signal at the second component.

5. The method of claim 1, including accumulating information about the sensed characteristic on the second component, composing a communication packet for the different communication channel carrying the accumulated information, and transmitting the packet on the different communication channel to the first component.

6. The method of claim 1, wherein the adjustable parameter comprises a drive timing point for the transmitter on the first component.

7. The method of claim 1, wherein the first component includes a plurality of transmitters with respective adjustable parameters, and the second component includes a plurality of receivers connected to communication links in common with corresponding transmitters in the plurality of transmitters on the first component, including:

sensing on the second component characteristics of data signals transmitted from the plurality of transmitters; and

feeding back information about the sensed characteristics, and adjusting the adjustable parameters for the plurality of transmitters on the first component using the information.

8. The method of claim 1, wherein the first component includes a plurality of transmitters with respective adjustable parameters, and the second component includes a plurality of receivers connected to communication links in common with corresponding transmitters in the plurality of transmitters on the first component, including:

sensing on the second component characteristics of data signals on the respective communication links transmitted from the plurality of transmitters;

accumulating information about the sensed characteristics on the second component, composing one or more communication packets for the different communication channel including the accumulated information and identifying the respective communication links, and transmitting the one or more packets on the different I communication channel to the first component; and

adjusting the adjustable parameters for transmitters in the plurality of transmitters on the first component in response to the accumulated information.

9. The method of claim 1, wherein the first component includes a receiver with an adjustable parameter, and the second component includes a transmitter, and including:

sensing on the first component a characteristic of a data signal received from the transmitter on the second component; and

adjusting the adjustable parameter for the receiver on the first component in response to the sensed characteristic of the received data signal.

10. The method of claim 1, wherein the first and second components comprise integrated circuits, and the transmitter on the first component transmits the data signal with a data rate of greater than one gigabit per second.

11. The method of claim 1, wherein the different communication channel includes a transmitter on the second component coupled to a pin on the second component, and wherein said pin is used for multiple functions.

12. The method of claim 1, wherein the different communication channel includes a transmitter coupled to a scan out port on the second component.

13. The method of claim 1, wherein the different communication channel includes a transmitter coupled to a serial port having a data rate slower than the communication channel.

14. The method of claim 1, including executing a calibration routine comprising transmitting calibration patterns from the second component to the first component on the communication channel, and adjusting the adjustable parameter to establish an operating value for the adjustable parameter.

15. An apparatus including a plurality of communication channels, comprising a first component and a second component coupled to the plurality of communication channels, the first component including

a plurality of first interface circuits on the first component coupled to corresponding communication channels in the plurality of communication channels, the first interface circuits including transmitters and receivers, wherein the transmitters have adjustable parameters which affect characteristics of transmitted data signals;

a first port on the first component for communication with a second component; and

logic coupled with the port, which reads information received on the first port from the second component, indicating sensed characteristics of data signals received at the second component, and adjusts the adjustable parameters for the transmitters in the plurality of first interface circuits using the information; and

the second component including

a plurality of second interface circuits connected to corresponding communication channels in the plurality of communication channels, the second interface circuits including transmitters and receivers;

a plurality of sensors on the second component coupled with corresponding second interface circuits in the plurality of second interface circuits, which sense characteristics of data signals received at the corresponding second interface circuits;

a second port on the second component for communication with the corresponding port on the first component; and

logic on the second component, coupled with the plurality of sensors and the port, which accumulates information about the sensed characteristics of the data signals and transmits the information on the second port to the first component.

16. The apparatus of claim 15, wherein the plurality of sensors comprises phase detectors.

17. The apparatus of claim 15, wherein the plurality of sensors comprises phase detectors, and the information is used for adjusting a drive timing point for the transmitters in the plurality of first interface circuits.

18. The apparatus of claim 15, wherein the first and second ports comprise serial ports.

19. The apparatus of claim 15, wherein the plurality of sensors comprises amplitude detectors, and the information is used for adjusting amplitudes for the transmitters in the plurality of first interface circuits.

20. The apparatus of claim 15, wherein the plurality of sensors comprises amplitude detectors, and the information is used for equalization parameters for the transmitters in the plurality of first interface circuits.

21. The apparatus of claim 15, wherein the logic which accumulates information composes a communication packet for transmission on the port, the packet carrying the accumulated information.

22. The apparatus of claim 15, wherein the receivers in the second interface circuits receive data signals with a data rate of greater than one gigabit per second.

23. The apparatus of claim 15, wherein first and second components consist of integrated circuits, and the first and second ports are coupled to pins on the integrated circuits, and wherein at least one of said pins is used for multiple functions.

24. The apparatus of claim 15, wherein first and second components consist of integrated circuits, and the first and second ports are coupled to pins on the integrated circuits, and wherein at least one of said pins is a scan out port on the integrated circuit.

25. The apparatus of claim 15, wherein the receivers in the interface circuits receive data signals with a data rate of greater than one gigabit per second and the port comprises a serial port having a data rate slower than the data rate of the data signals.

26. The apparatus of claim 15, wherein the receivers in the plurality of first interface circuits on the first component have adjustable parameters which affect sampling of data signals received from the other component, and including

a second plurality of sensors coupled with corresponding first interface circuits in said plurality of first interface circuits, which sense characteristics of data signals received at receivers in the corresponding first interface circuits;

and

logic coupled with the second plurality of sensors and the plurality of first interface circuits, which accumulates information about the sensed characteristics of the data signals received and uses the accumulated information for adjusting adjustable parameters for the receivers in the plurality of first interface circuits.

27. The apparatus of claim 26, wherein the second plurality of sensors comprises phase detectors, and the information is used for adjusting a sample timing point for the receivers in the plurality of first interface circuits.

28. The apparatus of claim 26, wherein the second plurality of sensors comprises amplitude detectors, and the information is used for adjusting thresholds for the receivers in the plurality of first interface circuits.

29. The apparatus of claim 26, wherein the second plurality of sensors comprises amplitude detectors, and the information is used for equalization parameters for the receivers in the plurality of first interface circuits.

30. The apparatus of claim 15, wherein the logic which reads information parses a communication packet received on the first port on the first component from the second port on the second component, the packet carrying the accumulated information.

31. A bus system interface for a bus system including a plurality of communication channels, the communication channels interconnecting transmitters on another component with the bus system interface, comprising:

a plurality of interface circuits adapted to be connected to corresponding communication channels in the bus system, the interface circuits including receivers;

a plurality of sensors coupled with corresponding interface circuits in the plurality of interface circuits, which sense characteristics of data signals received at the corresponding interface circuits; and

a port for communication with the other component; and

logic coupled with the plurality of sensors and the port, which accumulates information about the sensed characteristics of the data signals and transmits the information on the port for use in control of the transmitters on the other component.

32. The bus system interface of claim 31, wherein the plurality of sensors comprises phase detectors.

33. The bus system interface of claim 31, wherein the plurality of sensors comprises phase detectors, and the information is used for adjusting a drive timing point for the transmitters.

34. The bus system interface of claim 31, wherein the port comprises a serial port.

35. The bus system interface of claim 31, wherein the plurality of sensors comprises amplitude detectors, and the information is used for adjusting amplitudes for the transmitters.

36. The bus system interface of claim 31, wherein the plurality of sensors comprises amplitude detectors, and the information is used for equalization parameters for the transmitters.

37. The bus system interface of claim 31, wherein the logic which accumulates information composes a communication packet for transmission on the port, the packet carrying the accumulated information.

38. The bus system interface of claim 31, wherein the receivers in the interface circuits receive data signals with a data rate of greater than one gigabit per second.

39. The bus system interface of claim 31, wherein bus system interface comprises an element of an integrated circuit, and the port is coupled to a pin on the integrated circuit, and wherein said pin is used for multiple functions.

40. The bus system interface of claim 31, wherein bus system interface comprises an element of an integrated circuit, and the port is coupled to a pin on the integrated circuit, and wherein said pin is a scan out port on the integrated circuit.

41. The bus system interface of claim 31, wherein the receivers in the interface circuits receive data signals with a data rate of greater than one gigabit per second and the port comprises a serial port having a data rate slower than the data rate of the data signals.

42. A bus system interface for bus system including a plurality of communication channels, the communication channels interconnecting receivers on another component with the bus system interface, comprising:

a plurality of interface circuits adapted to be connected to corresponding communication channels in the bus system, the interface circuits including transmitters and receivers for corresponding communication channels in the plurality of communication channels, wherein the transmitters have adjustable parameters which affect characteristics of transmitted data signals;

a port for communication with the other component; and

logic coupled with the port, which reads information received on the port from the other component, indicating sensed characteristics of data signals received at the other component, and adjusts the adjustable parameters for the transmitters in the plurality of interface circuits using the information.

43. The bus system interface of claim 42, wherein the information indicating sensed characteristics of data signals received at the other component comprises phase information.

44. The bus system interface of claim 42, wherein the information indicating sensed characteristics of data signals received at the other component comprises phase information, and the information is used for adjusting drive timing points for the transmitters.

45. The bus system interface of claim 42, wherein the receivers in the plurality of interface circuits have adjustable parameters which affect sampling of data signals received from the other component, and including

a plurality of sensors coupled with corresponding interface circuits in said plurality of interface circuits, which sense characteristics of data signals received at receivers in the corresponding interface circuits;

and

logic coupled with the plurality of sensors and the plurality of interface circuits, which accumulates information about the sensed characteristics of the data signals received from the other component and uses the accumulated information for adjusting adjustable parameters for the receivers in the plurality of interface circuits.

46. The bus system interface of claim 45, wherein the plurality of sensors comprises phase detectors, and the information is used for adjusting a sample timing point for the receivers.

47. The bus system interface of claim 45, wherein the plurality of sensors comprises amplitude detectors, and the information is used for adjusting thresholds for the receivers.

48. The bus system interface of claim 45, wherein the plurality of sensors comprises amplitude detectors, and the information is used for equalization parameters for the receivers.

49. The bus system interface of claim 42, wherein the port comprises a serial port.

50. The bus system interface of claim 42, wherein the logic which reads information parses a communication packet received on the port, the packet carrying the accumulated information.

51. The bus system interface of claim 42, wherein the transmitters in the interface circuits transmit data signals with a data rate of greater than one gigabit per second.

52. The bus system interface of claim 42, wherein bus system interface comprises an element of an integrated circuit, and the port is coupled to a pin on the integrated circuit, and wherein said pin is used for multiple functions.

53. The bus system interface of claim 42, wherein bus system interface comprises an element of an integrated circuit, and the port is coupled to a pin on the integrated circuit, and wherein said pin is a scan out port on the integrated circuit.

54. The bus system interface of claim 42, wherein the transmitters in the interface circuits transmit data signals with a data rate of greater than one gigabit per second and the port comprises a serial port having a data rate slower than the data rate of the data signals.