Method of and system for determining the delay of digital signals

• US 20050276318A1
• Filed: 05/27/2005
• Published: 12/15/2005
• Est. Priority Date: 05/27/2004
• Status: Active Grant

• Current Assignee: Tag Safety Systems Incorporated
• Original Assignee: Tag Safety Systems Incorporated
• Inventors: Bokhour, Edward
• Granted Patent: US 7,672,363 B2
• Time in Patent Office: Days
• US Class Current: 375/219
• CPC Class Codes: G01S 13/76 wherein pulse-type signals are transmitted
• CPC Class Codes: G01S 13/878 Combination of several spaced transmitters or receivers of known location for determining the position of a transponder or a reflector G01S13/874 takes precedence
• CPC Class Codes: H04J 3/0682 by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging

Abstract

A method of and system for determining the time required for a digital bit or bit stream to traverse a round-trip path from a source transceiver to at least one destination transceiver and back is disclosed. The relative timing of the transmitted bit or bit stream is compared to the return bit or bit stream using a high speed comparison configuration so as to provide in substantially real-time various measurements related to or derived from the time required to traverse the round trip path, including distance measurement in indoor positioning, real-time locating, adaptive cruise control, intelligent transportation systems, robotics, collision avoidance, personnel accountability, emergency location, search and rescue, loss and theft prevention, logistics, marine safety, network analysis, communication channel characterization, and other high-speed measurement tasks. In addition, a method of and system for determining the distance between a source transceiver and a destination transceiver, and a method of and system for determining the angular position of a transceiver with respect to at least two other transceivers, are disclosed.

Claims

1. A method of determining the time required for a digital bit or bit stream to traverse a round-trip path from a source transceiver to at least one destination transceiver and back, the method comprising:

comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream using a high speed comparison configuration so as to provide in substantially real-time one or more measurements related to or derived from the time required to traverse the round trip path.

2. A method according to claim 1, wherein comparing the relative timing includes comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream using a high speed comparison configuration located at the source transceiver, at the destination transceiver, or both.

3. A method according to claim 1, wherein comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream includes measuring errors in such comparison in substantially real-time, and correcting for such errors.

4. A method according to claim 3, wherein the errors are one or more of the following:

fixed delays and jitter.

5. A method according to claim 1, further including oversampling the transmitted bit or bit stream and the return bit or bit stream at a multiple of the clocking rate of the transmitted bit or bit stream prior to comparing the relative timing of the two.

6. A method according to claim 5, wherein comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream includes using logical gates to make such comparison.

7. A method according to claim 5, wherein comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream includes using edge detection circuits to make such comparison.

8. A method according to claim 5, wherein comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream includes using sample and hold circuits to make such comparison.

9. A method according to claim 5, wherein comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream includes using analog-to-digital converters to make such comparison.

10. A method according to claim 5, wherein comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream includes using timers to make such comparison.

11. A method according to claim 5, wherein comparing the relative timing of the transmitted bit or bit stream to the return bit or bit stream includes using counters to make such comparison.

12. A method according to claim 1, further including determining the distance between the source transceiver and at least one destination transceiver as a function of the measured traversal time.

13. A method according to claim 1, further including determining the relative angular position of the source transceiver and the destination receiver and at least one other transceiver.

14. A method according to claim 1, further including interconnecting the source transceiver and destination transceiver through a wireless communication network, and coordinating individual transceiver measurement and communication tasks through the network.

15. A method according to claim 14, further including interconnecting a plurality of additional transceivers through the wireless communication network.

16. A method according to claim 15, further including communicating between the transceivers and network with a multi-hop, mesh, or ad-hoc transmission protocol.

17. A method of determining the angular position of a transceiver with respect to at least two other transceivers, the method comprising:

obtaining a distance measurement between a first and second transceiver as a function of a comparison of the relative timing of the transmitted bit or bit stream to the return bit or bit stream using a high speed comparison configuration at one of the first and second transceivers so as to provide in substantially real-time a measurement related to or derived from the time required to traverse the round trip path,

obtaining the distance measurement between at least a third transceiver and the one transceiver as a function of a comparison of the relative timing of the transmitted bit or bit stream to the return bit or bit stream using a high speed comparison configuration at the one transceiver so as to provide in substantially real-time a measurement related to or derived from the time required to traverse the round trip path, and

determining the angular position of the one transceiver with respect to other transceivers as a function of the distance measurements.

18. A method of determining the delay between the transmission of a transmitted digital signal by a first transceiver to a second transceiver and the reception of a return digital signal transmitted by the second transceiver to the first transceiver in response to receiving the transmitted digital signal, the method comprising:

oversampling the return digital signal at an oversampling rate S so as to provide an oversampled return signal, wherein the oversampling rate S is a multiple of the clock rate of the transmitted digital signal;

comparing the transmitted digital signal to the oversampled return digital signal and generating at least two bytes of bits at the oversampled rate, one of the bytes corresponding to the differential time period during which the leading edge of the transmitted digital signal is transmitted and the leading edge of the return digital signal is received by the first transceiver, and the other of the bytes corresponding to the differential time period during which the trailing edge of the transmitted digital signal is transmitted and the trailing edge of the returned signal is received by the first transceiver; and

assigning a value to each of the bytes as a function of the arrangement of the bits of each of the bytes, wherein the sequence of the least significant bit to most significant bit of one byte is temporally reversed;

determining the delay as a function of the assigned values of the two bytes.

19. The method according to claim 18, further including:

compensating for noise in the return digital signal.

20. The method according to claim 19, wherein the step of compensating for noise in the return digital signal includes compensating for the out-of-phase component of noise.

21. The method according to claim 20, wherein the step of compensating for the out-of-phase component of noise includes:

determining the out-of-phase component as a function of the difference between the logical inverse of one of the bytes and the logical value of the other of the bytes.

22. A system for determining the time required for a digital bit or bit stream to traverse a round-trip path from a source transceiver to at least one destination transceiver and back, the system comprising:

a high speed logical comparison configuration configured and arranged so as to determine the relative timing of the transmitted bit or bit stream to the return bit or bit stream and so as to provide in substantially real-time various measurements related to or derived from the time required to traverse the round trip path.

23. A system according to claim 22, wherein high speed comparison configuration is located at the source transceiver, at the destination transceiver, or both.

24. A system according to claim 22, wherein the high speed comparison configuration includes error correction configured and arranged so as to measure and correct for errors.

25. A system according to claim 24, wherein the error correction is configured and arranged so as to correct for one or more of the following:

fixed delays and jitter.

26. A system according to claim 22, further including an oversampling configuration configured and arranged so as to oversample the transmitted bit or bit stream and the return bit or bit stream at a multiple of the clocking rate of the transmitted bit or bit stream prior to comparing the relative timing of the two.

27. A system according to claim 22, wherein the high speed comparison configuration includes logical gates configured and arranged so as to make the comparison.

28. A system according to claim 22, wherein the high speed comparison configuration includes edge detection circuits configured and arranged to make such comparison.

29. A system according to claim 22, wherein the high speed comparison configuration includes sample and hold circuits configured and arranged to make such comparison.

30. A system according to claim 22, wherein the high speed comparison configuration includes analog-to-digital converters to make such comparison.

31. A system according to claim 22, wherein the high speed comparison configuration includes timers to make such comparison.

32. A system according to claim 22, wherein the high speed comparison configuration includes counters to make such comparison.

33. A system according to claim 22, further including a processor configured and arranged so as to determine the distance between the source transceiver and at least one destination transceiver as a function of the measured traversal time.

34. A system according to claim 22, further including a processor configured and arranged so as to determine the angular position of the source transceiver and the destination receiver and at least one other transceiver.

35. A system according to claim 22, further including a wireless communication network configured and arranged so as to interconnect the source transceiver and destination transceiver, and coordinate individual transceiver measurement and communication tasks through the network.

36. A system according to claim 35, further including a plurality of additional transceivers interconnected through the wireless communication network.

37. A system according to claim 36, wherein the wireless communication network includes a multi-hop, mesh, or ad-hoc transmission protocol.

38. A system for determining the angular position of a transceiver with respect to at least two other transceivers, the system comprising:

first and second transceivers including a high speed logical comparison configuration configured and arranged at one or both of the transceivers so as to obtain a distance measurement between the first and second transceivers as a function of a comparison of the relative timing of a transmitted bit or bit stream to the return bit or bit stream at the one transceiver so as to provide in substantially real-time a measurement of the time required to traverse the round trip path,

a distance measurement component configured and arranged so as to obtain the distance measurement between at least a third transceiver and the one transceiver as a function of a comparison of the relative timing of the transmitted bit or bit stream to the return bit or bit stream using a high speed comparison configuration at the one transceiver so as to provide in substantially real-time a measurement of the time required to traverse the round trip path, and

an angular position determination component configured and arranged so as to determine the angular position of the one transceiver with respect to other transceivers as a function of the distance measurements.

39. A system for determining the delay between the transmission of a transmitted digital signal by a source transceiver to a destination transceiver and the reception of a return digital signal transmitted by the destination transceiver to the source transceiver in response to receiving the transmitted digital signal, the system comprising:

the source and destination transceivers configured and arranged so as to define at least in part the round trip transmission path of the transmitted digital signal and the return digital signal;

the source transceiver including an oversampling component configured and arranged so as to oversample the return digital signal at an oversampling rate S so as to provide an oversampled return signal, wherein the oversampling rate S is a multiple of the clock rate of the transmitted digital signal;

a high speed comparison configuration configured and arranged so as to compare the transmitted digital signal to the oversampled return digital signal and generating at least two bytes of bits at the oversampled rate, one of the bytes corresponding to the differential time period during which the leading edge of the transmitted digital signal is transmitted and the leading edge of the return digital signal is received by the first transceiver, and the other of the bytes corresponding to the differential time period during which the trailing edge of the transmitted digital signal is transmitted and the trailing edge of the returned signal is received by the first transceiver; and

a value assignment component configured and arranged so as to assign a value to each of the bytes as a function of the arrangement of the bits of each of the bytes, wherein the sequence of the least significant bit to most significant bit of one byte is temporally reversed;

a delay determination component configured and arranged so as to determine the delay as a function of the assigned values of the two bytes.

40. The system according to claim 39, further including a processor or other means for accumulating a plurality of assigned values representing the delays for a plurality of transmitted and returned bits.

41. The system according to claim 39, further including a noise compensation component configured and arranged so as to compensate for noise in the return digital signal.

42. The system according to claim 41, wherein the noise compensation component is configured and arranged so as to compensate for the out-of-phase component of noise.

43. The system according to claim 42, wherein the noise compensation component is configured and arranged so as to determine the out-of-phase component as a function of the difference between logical inverse of one of the bytes to the logical value of the other of the bytes.

44. The system according to claim 40, further including a noise compensation component configured and arranged so as to compensate for noise in the return digital signal.

45. The system according to claim 44, wherein the noise compensation component is configured and arranged so as to compensate for the out-of-phase component of noise.

46. The system according to claim 45, wherein the noise compensation component is configured and arranged so as to determine the out-of-phase component as a function of the difference between logical inverse of one of the bytes to the logical value of the other of the bytes.