Shift register and electronic device using the same

• US 20050276369A1
• Filed: 05/19/2005
• Published: 12/15/2005
• Est. Priority Date: 05/20/2004
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Mutaguchi, Kohei
• Granted Patent: US 7,245,690 B2
• Time in Patent Office: Days
• US Class Current: 377/64
• CPC Class Codes: G09G 2330/08 Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G11C 19/00 Digital stores in which the information is moved stepwise, e.g. shift registers
• CPC Class Codes: G11C 29/848 by adjacent switching
• CPC Class Codes: G11C 29/86 in serial access memories, e.g. shift registers, CCDs, bubble memories

Abstract

The invention provides a shift register which can function normally even with an abnormal register or a broken register while suppressing the manufacturing cost as little as possible. The shift register of the invention includes n regular registers (SR(1) to SR(n)) connected in series and n output lines (L1 to Ln) corresponding to the n regular registers, r (r≦n) redundant registers (SR(n+1) to SR(n+r)) connected in series to the n regular registers, and a switch circuit for selectively connecting the regular and redundant resistors to output lines. The switch circuit connects the n regular registers to the corresponding output lines in a normal state, connects normal registers of upper and lower stages of the broken register by skipping and disabling the broken register if any, and connects normal regular registers and the same number of redundant registers as the broken registers to the n output lines.

Claims

1. A shift register comprising:

n (n≧

1) regular registers connected in series;

n output lines;

r (n≧

r≧

1) redundant registers connected in series to the n regular registers; and

a switch circuit for selectively connecting the (n+r) regular registers and redundant registers to the n output lines,

wherein the switch circuit connects the n regular registers to the corresponding output line in a normal state,

wherein the switch circuit connects a normal register of an upper stage than an abnormal register to a normal register of a lower stage than the abnormal register by skipping the abnormal register, and

wherein the switch circuit disables the abnormal register, and connects normal regular registers and redundant registers in the same number as the abnormal register to the n output lines.

2. The shift register according to claim 1, wherein the switch circuit comprises:

first terminal, second terminal, third terminal, and a control terminal; and

(n+r) switches in which the first terminal can be selectively connected to one of the second and third terminals in accordance with a control signal inputted to the control terminal,

wherein the first terminal of each switch is connected to one output terminal corresponding to the (n+r) registers;

wherein the third terminal of an upper stage switch and the second terminal of a lower stage switch are connected between a pair of adjacent switches; and

wherein the second terminal of the switch of top stage is connected to an input terminal of the shift register.

3. The shift register according to claim 2, wherein the switch of a bottom stage comprises only a first terminal and a second terminal.

4. The shift register according to claim 2, wherein the switch circuit comprises a disable circuit which disables a register which is determined to be broken from a state of the switch.

5. The shift register according to claim 4, wherein a buffer circuit is connected to each output of the register;

and

wherein the disable circuit stops an operation voltage supply to the buffer circuit corresponding to the abnormal register and makes an output of the abnormal register electrically floating.

6. The shift register according to claim 2, wherein the switch circuit includes a control signal line comprising a conducting wire of which one end is connected to a low voltage source and the other end is connected to a high voltage source;

wherein each of the control terminal of the switch is connected to the control signal line and a voltage from one of the high voltage source and the low voltage source is supplied to each of the control terminal of the switch in a normal state; and

wherein the control signal line is cut off between a selected switch and a switch of one stage lower than the selected switch so that a voltage from the other of the high voltage source and the low voltage source is supplied as the control signal to lower stage switches than the selected switch.

7. The shift register according to claim 6, wherein the control signal line comprises a fuse.

8. The shift register according to claim 1, wherein the shift register is incorporated in a display device.

9. The shift register according to claim 8, wherein the display device is incorporated in at least one selected from the group consisting of a digital camera, a mobile computer, an image reproducing device, a goggle type display, a video camera, a portable phone, and a navigation system.

10. A shift register comprising:

n (n≧

1) regular registers connected in series;

n output lines;

one redundant register connected in series to the n regular registers; and

a switch circuit for selectively connecting the (n+1) regular registers and the redundant registers to the n output lines,

wherein the switch circuit comprises;

first terminal, second terminal, third terminal, and a control terminal; and

(n+1) switches in which the first terminal can be selectively connected to one of the second and third terminals in accordance with a control signal inputted to the control terminal,

wherein the first terminal of each switch is connected to one output terminal of the corresponding (n+1) registers;

wherein the third terminal of an upper stage switch and the second terminal of a lower stage switch are connected between a pair of adjacent switches;

wherein the second terminal of the switch of a top stage is connected to an input terminal of the shift register;

wherein the switch circuit connects the n regular registers to the corresponding output line in a normal state,

wherein the switch circuit connects a normal register of an upper stage than an abnormal register to a normal register of a lower stage than the abnormal register by skipping the abnormal register,

wherein the switch circuit disables the abnormal register, and connects normal regular registers and redundant registers in the same number as the abnormal register to the n output lines, and

wherein each of the n output lines is connected to the third terminal of the corresponding switch and the second terminal of a switch of one lower stage.

11. The shift register according to claim 10, wherein the shift register is incorporated in a display device.

12. The shift register according to claim 11, wherein the display device is incorporated in at least one selected from the group consisting of a digital camera, a mobile computer, an image reproducing device, a goggle type display, a video camera, a portable phone, and a navigation system.

13. A shift register comprising:

n (n≧

1) regular registers connected in series;

n output lines;

two redundant registers connected in series to the n regular registers; and

a switch circuit for selectively connecting the (n+2) regular registers and the redundant registers to the n output lines,

wherein the switch circuit comprises;

first terminal, second terminal, third terminal, and a control terminal; and

(n+2) first switches and (n+1) second switches in which the first terminal can be selectively connected to one of the second and third terminals in accordance with a control signal inputted to the control terminal, wherein the first terminal of each of the first switch is connected to one corresponding output terminal of the (n+2) registers;

wherein the third terminal of a switch of an upper stage of a pair of adjacent first switches is connected to the second terminal of a switch of a lower stage;

wherein the second terminal of the first switch of a top stage is connected to an input terminal of the shift register;

wherein each second switch is connected to the third terminal of the first switch corresponding to the first terminal and the second terminal of the first switch of one stage lower;

wherein the third terminal of an upper stage switch and the second terminal of a lower stage switch are connected between a pair of adjacent switches;

wherein the second terminal of a second switch of top stage is connected to an input terminal of the shift register, and

wherein the switch circuit connects the n regular registers to the corresponding output line in a normal state,

wherein the switch circuit connects a normal register of an upper stage than an abnormal register to a normal register of a lower stage than the abnormal register by skipping the abnormal register, and

wherein the switch circuit disables the abnormal register, and connects normal regular registers and redundant registers in the same number as the abnormal register to the n output lines.

14. The shift register according to claim 13, wherein the shift register is incorporated in a display device.

15. The shift register according to claim 14, wherein the display device is incorporated in at least one selected from the group consisting of a digital camera, a mobile computer, an image reproducing device, a goggle type display, a video camera, a portable phone, and a navigation system.

16. A shift register comprising:

n (n≧

1) regular registers connected in series;

n output lines;

two redundant registers connected in series to the n regular registers; and

a switch circuit for selectively connecting the (n+2) regular registers and the redundant registers to the n output lines,

wherein the switch circuit comprises;

first terminal, second terminal, third terminal, and a control terminal; and

(n+2) first switches and (n+1) second switches in which the first terminal can be selectively connected to one of the second and third terminals in accordance with a control signal inputted to the control terminal,

wherein the first terminal of each of the first switch is connected to one corresponding output terminal of the (n+2) registers;

wherein the third terminal of a switch of an upper stage of a pair of adjacent first switches is connected to the second terminal of a switch of a lower stage;

wherein the second terminal of the first switch of a top stage is connected to an input terminal of the shift register;

wherein each second switch is connected to the third terminal of the first switch corresponding to the first terminal and the second terminal of the first switch of one stage lower;

wherein the third terminal of an upper stage switch and the second terminal of a lower stage switch are connected between a pair of adjacent switches;

wherein each of the n output lines is connected to the third terminal of the corresponding second switch and the second terminal of a second switch of one lower stage;

wherein the second terminal of the second switch of top stage is connected to an input terminal of the shift register;

wherein the switch circuit includes a control signal line comprising a conducting wire of which one end is connected to a low voltage source and the other end is connected to a high voltage source;

wherein each of the control terminal of the first switch is sequentially connected to the first control signal line and a voltage from one of the high voltage source and the low voltage source is supplied to each of the control terminal of the first switch in a normal state;

wherein each of the control terminal of the second switch is sequentially connected to the second control signal line and a voltage from one of the high voltage source and the low voltage source is supplied to each of the control terminal of the second switch in a normal state;

wherein the first control signal line is cut off between a selected first switch and a first switch of one stage lower so that a voltage from the other of the high voltage source and the low voltage source is supplied as the control signal to a first switch of lower stage than the selected first switch;

wherein the second control signal line is cut off between a selected second switch and a second switch of one stage lower so that a voltage from the other of the high voltage source and the low voltage source is supplied as the control signal to a second switch of lower stage than the selected second switch;

wherein the switch circuit connects the n regular registers to the corresponding output line in a normal state,

wherein the switch circuit connects a normal register of an upper stage than an abnormal register to a normal register of a lower stage than the abnormal register by skipping the abnormal register, and

wherein the switch circuit disables the abnormal register, and connects normal regular registers and redundant registers in the same number as the abnormal register to the n output lines.

17. The shift register according to claim 16, wherein at least one of the first control signal line and the second control signal line comprises a fuse.

18. The shift register according to claim 16, wherein the shift register is incorporated in a display device.

19. The shift register according to claim 18, wherein the display device is incorporated in at least one selected from the group consisting of a digital camera, a mobile computer, an image reproducing device, a goggle type display, a video camera, a portable phone, and a navigation system.

20. A shift register comprising:

n (n≧

1) regular registers connected in series;

n output lines;

r (n≧

r≧

1) redundant registers connected in series to the n regular registers; and

a switch circuit for selectively connecting the (n+r) regular registers and redundant registers to the n output lines,

wherein the switch circuit connects i-th (n≧

i≧

1) register and (i+2)-th register by skipping (i+1)-th register when the (i+1)-th register is an abnormal register, and

wherein one of the r redundant registers is connected to one of the n output lines through the switch circuit.

21. The shift register according to claim 20, wherein the switch circuit comprises:

first terminal, second terminal, third terminal, and a control terminal; and

(n+r) switches in which the first terminal can be selectively connected to one of the second and third terminals in accordance with a control signal inputted to the control terminal,

wherein the first terminal of each switch is connected to one output terminal corresponding to the (n+r) registers;

wherein the third terminal of an upper stage switch and the second terminal of a lower stage switch are connected between a pair of adjacent switches; and

wherein the second terminal of the switch of top stage is connected to an input terminal of the shift register.

22. The shift register according to claim 21, wherein the switch of a bottom stage comprises only a first terminal and a second terminal.

23. The shift register according to claim 21, wherein the switch circuit comprises a disable circuit which disables a register which is determined to be broken from a state of the switch.

24. The shift register according to claim 23, wherein a buffer circuit is connected to each output of the register;

and

wherein the disable circuit stops an operation voltage supply to the buffer circuit corresponding to the abnormal register and makes an output of the abnormal register electrically floating.

25. The shift register according to claim 21, wherein the switch circuit includes a control signal line comprising a conducting wire of which one end is connected to a low voltage source and the other end is connected to a high voltage source;

wherein each of the control terminal of the switch is connected to the control signal line and a voltage from one of the high voltage source and the low voltage source is supplied to each of the control terminal of the switch in a normal state; and

wherein the control signal line is cut off between a selected switch and a switch of one stage lower than the selected switch so that a voltage from the other of the high voltage source and the low voltage source is supplied as the control signal to lower stage switches than the selected switch.

26. The shift register according to claim 25, wherein the control signal line comprises a fuse.

27. The shift register according to claim 20, wherein the shift register is incorporated in a display device.

28. The shift register according to claim 27, wherein the display device is incorporated in at least one selected from the group consisting of a digital camera, a mobile computer, an image reproducing device, a goggle type display, a video camera, a portable phone, and a navigation system.