Trench FET with reduced mesa width and source contact inside active trench

• US 20050280079A1
• Filed: 06/21/2005
• Published: 12/22/2005
• Est. Priority Date: 06/21/2004
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Jones, David P.
• Granted Patent: US 7,402,863 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0865 Disposition
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trench FET has source contacts which contact the entire top surface of source regions, and contact a portion of side walls of the source regions. The side walls of the source regions form a portion of the side walls of the trenches in the trench FET.

Claims

1. A trench-type MOSFET comprising a plurality of equally spaced trenches, said plurality of trenches defining a plurality of mesas, each of said mesas being between a pair of adjacent trenches, and a plurality of source regions of a first conductivity formed in at least a part of the top surface of said mesa and an adjoining side wall of the trench, the top surface and side wall portions of the source regions being contacted by a contact layer, the contact layer extending down at least a portion of the side walls of at least one of the source regions forming a portion of side walls of a pair of adjacent trenches.

2. A trench-type MOSFET of claim 1, wherein each of the plurality of trenches contain a gate electrode surrounded by gate insulation.

3. A trench-type MOSFET of claim 2, wherein said gate electrode is polysilicon.

4. A trench-type MOSFET of claim 2, wherein said gate insulation is silicon dioxide.

5. A trench-type MOSFET of claim 1, wherein the contact layer is composed of silicide.

6. A trench-type MOSFET of claim 1, further comprising a substrate of said first conductivity, an epitaxial layer of said first conductivity formed on said substrate, and a channel region of a second conductivity formed in said epitaxial layer, said plurality of source regions being formed in said channel region.

7. A trench-type MOSFET of claim 6, wherein said plurality of trenches are formed in a vertical depth sufficient so that a bottom of each trench is in said epitaxial layer.

8. A trench-type MOSFET of claim 1, further comprising at least one high conductivity contact region of a second conductivity between each pair of adjacent trenches.

9. A trench-type MOSFET of claim 1, further comprising a source electrode at least contacting said contact layer.