Phase locked loop circuit

• US 20050280453A1
• Filed: 03/22/2005
• Published: 12/22/2005
• Est. Priority Date: 06/18/2004
• Status: Abandoned Application

• Current Assignee: VIA Technologies Incorporated (VIA Technologies)
• Original Assignee: VIA Technologies Incorporated (VIA Technologies)
• Inventors: Hsieh, Yi-Bin
• Application Number:
  US11/086,541
• Publication Number:
  US 20050280453A1
• Time in Patent Office: Days
• US Class Current: 327/156
• CPC Class Codes: H03L 7/0893 the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence

Abstract

A phase locked loop circuit includes a loop filter having a first input terminal and a second input terminal and including a first capacitor coupled to the first terminal; a resistor having one terminal coupled to the first input terminal; a second capacitor coupled to the second input terminal; and a source follower having an input terminal coupled to the second input terminal and an output terminal coupled the other terminal of the resistor; a first charge pump coupled to the first input terminal outputting a first current; and a second charge pump coupled to the second input terminal outputting a second current; wherein the first current is a multiple of the second current.

Claims

1. A phase locked loop circuit comprising:

a loop filter having a first input terminal and a second input terminal and comprising;

a first capacitor coupled to the first terminal;

a resistor having one terminal coupled to the first input terminal;

a second capacitor coupled to the second input terminal; and

a source follower having an input terminal coupled to the second input terminal and an output terminal coupled the other terminal of the resistor;

a first charge pump coupled to the first input terminal outputting a first current; and

a second charge pump coupled to the second input terminal outputting a second current;

wherein the first current is a multiple of the second current.

2. The phase locked loop circuit as claimed in claim 1, further comprising a current source coupled to the output terminal of the source follower.

3. The phase locked loop circuit as claimed in claim 1, further comprising a voltage controlled oscillator coupled to the output terminal of the loop filter.

4. The phase locked loop circuit as claimed in claim 3, further comprising a first frequency divider coupled to the output terminal of the voltage controlled oscillator outputting a feedback signal.

6. The phase locked loop circuit as claimed in claim 1, wherein the source follower comprises a drain connected to a fixed voltage source, a gate as the input terminal coupled to the output terminal of the second charge pump and a source connected to the other terminal of the resistor.

5. The phase locked loop circuit as claimed in claim 5, further comprising a phase detector having two input terminals respectively coupled to the output terminal of the first frequency divider and a second frequency divider, and two output terminals respectively connected to the first charge pump and the second charge pump.