Method for manufacturing semiconductor substrate and semiconductor substrate

• US 20050282019A1
• Filed: 06/08/2005
• Published: 12/22/2005
• Est. Priority Date: 06/18/2004
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Fukushima, Yasumori, Takafuji, Yutaka
• Granted Patent: US 7,563,693 B2
• Time in Patent Office: Days
• US Class Current: 428/428
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68363 used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/0101 Neon [Ne]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/01018 Argon [Ar]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01054 Xenon [Xe]
• CPC Class Codes: H01L 2924/01057 Lanthanum [La]
• CPC Class Codes: H01L 2924/01073 Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 Tungsten [W]
• CPC Class Codes: H01L 2924/04953 TaN
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/1301 Thyristor
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/30105 : Capacitance

Abstract

A method for manufacturing a semiconductor substrate comprises the steps of: forming a gate oxide film as an insulating layer on the surface of a semiconductor substrate; implanting boron ions for inhibiting the migration of a peeling substance in the semiconductor substrate to form an anti-diffusion layer in the semiconductor substrate; activating boron in the anti-diffusion layer by heat treatment; implanting hydrogen ions into the semiconductor substrate to form a peel layer in part of the semiconductor substrate at a side of the anti-diffusion layer opposite to the gate oxide film; bonding a glass substrate to the surface of the semiconductor substrate where the gate oxide film has been formed; and heat-treating the semiconductor substrate to separate part of the semiconductor substrate along the peel layer.

Claims

1. A method for manufacturing a semiconductor substrate comprising:

forming an anti-diffusion layer and a peel layer in a substrate; and

performing heat treatment to peel part of the substrate off along the peel layer, wherein

the anti-diffusion layer is formed to inhibit the diffusion of a peeling substance in the peel layer beyond the anti-diffusion layer.

2. A method according to claim 1, wherein the substrate is a monocrystalline silicon substrate.

3. A method according to claim 1, wherein the substrate is provided with at least part of a semiconductor element before the part of the substrate is peeled off along the peel layer.

4. A method according to claim 1, wherein the substrate is provided with a completed semiconductor element before the part of the substrate is peeled off along the peel layer.

5. A method according to claim 1, wherein the peel layer and the anti-diffusion layer are removed from the substrate after the part of the substrate is peeled off.

6. A method according to claim 1, wherein the substrate is provided with at least part of a semiconductor element after the peel layer and the anti-diffusion layer are removed from the substrate.

7. A method according to claim 1, wherein the peel layer is a layer in which the peak of the concentration distribution of the peeling substance extends in a plane substantially parallel to the substrate surface.

8. A method according to claim 1, wherein the peeling substance is hydrogen.

9. A method according to claim 1, wherein the peeling substance is hydrogen and inert gas.

10. A method according to claim 1, wherein the anti-diffusion layer contains a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the diffusion inhibiting substance is boron.

11. A method according to claim 10, wherein the anti-diffusion layer is formed by boron ion implantation performed at an implantation energy E (KeV) and a dose D (cm⁻

2) which satisfy the condition of D≦

2.7×

10⁸×

E^2.78.

12. A method according to claim 3, wherein the anti-diffusion layer contains boron as a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the concentration of the diffusion inhibiting substance in a semiconductor layer of the semiconductor element is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

13. A method according to claim 4, wherein the anti-diffusion layer contains boron as a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the concentration of the diffusion inhibiting substance in a semiconductor layer of the semiconductor element is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

14. A method according to claim 3 further comprising:

forming a protective film on the substrate;

forming a semiconductor layer as part of the semiconductor element in the substrate by ion implantation;

removing the protective film; and

forming an insulating film on the semiconductor substrate by heat treatment at a temperature of 900°

C. or more, wherein the formation of an anti-diffusion layer is implemented by introducing a substance for forming the anti-diffusion layer by ion implantation.

15. A method for manufacturing a semiconductor substrate comprising the steps of:

forming in a substrate an anti-diffusion layer which inhibits the diffusion of a peeling substance beyond the anti-diffusion layer;

forming a peel layer containing the peeling substance in the substrate; and

performing heat treatment to peel part of the substrate off along the peel layer.

16. A method according to claim 15, wherein the substrate is a monocrystalline silicon substrate.

17. A method according to claim 15, wherein the substrate is provided with at least part of a semiconductor element before the part of the substrate is peeled off along the peel layer.

18. A method according to claim 15, wherein the substrate is provided with a completed semiconductor element before the part of the substrate is peeled off along the peel layer.

19. A method according to claim 15, wherein the peel layer and the anti-diffusion layer are removed from the substrate after the part of the substrate is peeled off.

20. A method according to claim 15, wherein the substrate is provided with at least part of a semiconductor element after the peel layer and the anti-diffusion layer are removed from the substrate.

21. A method according to claim 15, wherein the peel layer is a layer in which the peak of the concentration distribution of the peeling substance extends in a plane substantially parallel to the substrate surface.

22. A method according to claim 15, wherein the peeling substance is hydrogen.

23. A method according to claim 15, wherein the peeling substance is hydrogen and inert gas.

24. A method according to claim 15, wherein the anti-diffusion layer contains a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the diffusion inhibiting substance is boron.

25. A method according to claim 24, wherein the anti-diffusion layer is formed by boron ion implantation performed at an implantation energy E (KeV) and a dose D (cm⁻

2) which satisfy the condition of D≦

2.7×

10⁸×

E^2.78.

26. A method according to claim 17, wherein the anti-diffusion layer contains boron as a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the concentration of the diffusion inhibiting substance in a semiconductor layer of the semiconductor element is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

27. A method according to claim 18, wherein the anti-diffusion layer contains boron as a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the concentration of the diffusion inhibiting substance in a semiconductor layer of the semiconductor element is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

28. A method according to claim 17 further comprising the steps of:

forming a protective film on the substrate;

forming a semiconductor layer as part of the semiconductor element in the substrate by ion implantation;

removing the protective film; and

forming an insulating film on the semiconductor substrate by heat treatment at a temperature of 900°

C. or more, wherein the step of forming an anti-diffusion layer comprises introducing a substance for forming the anti-diffusion layer by ion implantation.

29. A method for manufacturing a semiconductor substrate comprising:

forming an anti-diffusion layer and a peel layer in a substrate;

bonding the substrate to a second substrate; and

performing heat treatment to peel part of the substrate off along the peel layer, wherein

the anti-diffusion layer is formed to inhibit the diffusion of a peeling substance in the peel layer beyond the anti-diffusion layer.

30. A method according to claim 29, wherein the second substrate is a glass substrate.

31. A method according to claim 29, wherein the substrate is a monocrystalline silicon substrate.

32. A method according to claim 29, wherein the substrate is provided with at least part of a semiconductor element before the part of the substrate is peeled off along the peel layer.

33. A method according to claim 29, wherein the substrate is provided with a completed semiconductor element before the part of the substrate is peeled off along the peel layer.

34. A method according to claim 29, wherein the peel layer and the anti-diffusion layer are removed from the substrate after the part of the substrate is peeled off.

35. A method according to claim 29, wherein the substrate is provided with at least part of a semiconductor element after the peel layer and the anti-diffusion layer are removed from the substrate.

36. A method according to claim 29, wherein the peel layer is a layer in which the peak of the concentration distribution of the peeling substance extends in a plane substantially parallel to the substrate surface.

37. A method according to claim 29, wherein the peeling substance is hydrogen.

38. A method according to claim 29, wherein the peeling substance is hydrogen and inert gas.

39. A method according to claim 29, wherein the anti-diffusion layer contains a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the diffusion inhibiting substance is boron.

40. A method according to claim 39, wherein the anti-diffusion layer is formed by boron ion implantation performed at an implantation energy E (KeV) and a dose D (cm⁻

2) which satisfy the condition of D≦

2.7×

10⁸×

E^2.78.

41. A method according to claim 32, wherein the anti-diffusion layer contains boron as a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the concentration of the diffusion inhibiting substance in a semiconductor layer of the semiconductor element is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

42. A method according to claim 33, wherein the anti-diffusion layer contains boron as a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the concentration of the diffusion inhibiting substance in a semiconductor layer of the semiconductor element is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

43. A method according to claim 32 further comprising:

forming a protective film on the substrate;

forming a semiconductor layer as part of the semiconductor element in the substrate by ion implantation;

removing the protective film; and

forming an insulating film on the semiconductor substrate by heat treatment at a temperature of 900°

C. or more, wherein the formation of an anti-diffusion layer is implemented by introducing a substance for forming the anti-diffusion layer by ion implantation.

44. A method for manufacturing a semiconductor substrate comprising the steps of:

forming in a substrate an anti-diffusion layer which inhibits the diffusion of a peeling substance beyond the anti-diffusion layer;

forming a peel layer containing the peeling substance in the substrate; and

performing heat treatment to peel part of the substrate off along the peel layer after the substrate is bonded to a second substrate.

45. A method according to claim 44, wherein the second substrate is a glass substrate.

46. A method according to claim 44, wherein the substrate is a monocrystalline silicon substrate.

47. A method according to claim 44, wherein the substrate is provided with at least part of a semiconductor element before the part of the substrate is peeled off along the peel layer.

48. A method according to claim 44, wherein the substrate is provided with a completed semiconductor element before the part of the substrate is peeled off along the peel layer.

49. A method according to claim 44, wherein the peel layer and the anti-diffusion layer are removed from the substrate after the part of the substrate is peeled off.

50. A method according to claim 44, wherein the substrate is provided with at least part of a semiconductor element after the peel layer and the anti-diffusion layer are removed from the substrate.

51. A method according to claim 44, wherein the peel layer is a layer in which the peak of the concentration distribution of the peeling substance extends in a plane substantially parallel to the substrate surface.

52. A method according to claim 44, wherein the peeling substance is hydrogen.

53. A method according to claim 44, wherein the peeling substance is hydrogen and inert gas.

54. A method according to claim 44, wherein the anti-diffusion layer contains a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the diffusion inhibiting substance is boron.

55. A method according to claim 54, wherein the anti-diffusion layer is formed by boron ion implantation performed at an implantation energy E (KeV) and a dose D (cm⁻

2) which satisfy the condition of D≦

2.7×

10⁸×

E^2.78.

56. A method according to claim 47, wherein the anti-diffusion layer contains boron as a diffusion inhibiting substance for inhibiting the diffusion of the peeling substance and the concentration of the diffusion inhibiting substance in a semiconductor layer of the semiconductor element is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

57. A method according to claim 48, wherein the anti-diffusion layer contains boron as a diffusion inhibiting substance for inhibiting the diffusion of the peeling-substance and the concentration of the diffusion inhibiting substance in a semiconductor layer of the semiconductor element is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

58. A method according to claim 47 further comprising the steps of:

forming a protective film on the substrate;

forming a semiconductor layer as part of the semiconductor element in the substrate by ion implantation;

removing the protective film; and

forming an insulating film on the semiconductor substrate by heat treatment at a temperature of 900°

C. or more, wherein the step of forming an anti-diffusion layer comprises introducing a substance for forming the anti-diffusion layer by ion implantation.

59. A method for manufacturing a semiconductor substrate comprising the steps of:

implanting ions including boron ions into a substrate to form an anti-diffusion layer in the substrate;

activating boron contained in the anti-diffusion layer;

implanting ions including hydrogen ions into the substrate to form a peel layer in part of the substrate at a side of the anti-diffusion layer opposite to the substrate surface from which the ion implantation is carried out and along the anti-diffusion layer; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

60. A method according to claim 59, wherein the substrate is a monocrystalline silicon substrate.

61. A method for manufacturing a semiconductor substrate comprising the steps of:

implanting ions including boron ions into a substrate to form an anti-diffusion layer in the substrate;

activating boron contained in the anti-diffusion layer;

implanting ions including hydrogen ions into the substrate to form a peel layer in part of the substrate at a side of the anti-diffusion layer opposite to the substrate surface from which the ion implantation is carried out;

bonding the substrate to a second substrate; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

62. A method according to claim 61, wherein the second substrate is a glass substrate.

63. A method according to claim 61, wherein the substrate is a monocrystalline silicon substrate.

64. A method for manufacturing a semiconductor substrate comprising the steps of:

forming at least part of a semiconductor element in a substrate;

implanting ions including boron ions into the substrate along the part of the semiconductor element to form an anti-diffusion layer in the substrate;

activating boron contained the anti-diffusion layer;

implanting ions including hydrogen ions into part of the substrate at a side of the anti-diffusion layer opposite to the part of the semiconductor element to form a peel layer; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

65. A method according to claim 64, wherein the part of the semiconductor element formed in the step of forming at least part of the semiconductor element is a semiconductor layer.

66. A method according to claim 64, wherein the substrate is a monocrystalline silicon substrate.

67. A method for manufacturing a semiconductor substrate comprising the steps of:

forming at least part of a semiconductor element in a substrate;

implanting ions including boron ions into the substrate along the part of the semiconductor element to form an anti-diffusion layer;

activating boron contained in the anti-diffusion layer;

implanting ions including hydrogen ions into part of the substrate at a side of the anti-diffusion layer opposite to the part of the semiconductor element to form a peel layer;

bonding the substrate to a second substrate; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

68. A method according to claim 67, wherein the part of the semiconductor element formed in the step of forming at least part of the semiconductor element is a semiconductor layer.

69. A method according to claim 67, wherein the second substrate is a glass substrate.

70. A method according to claim 67, wherein the substrate is a monocrystalline silicon substrate.

71. A semiconductor substrate which is made of monocrystalline silicon material and part of which is peeled off along a peel layer containing hydrogen, wherein the semiconductor substrate includes at least part of a semiconductor element and a peak of the concentration distribution of boron formed in a plane along the part of the semiconductor element.

72. A semiconductor substrate comprising a monocrystalline silicon substrate provided with at least part of a semiconductor element, wherein the semiconductor substrate includes a peak of the concentration distribution of boron formed in a plane along the part of the semiconductor element and a peak of the concentration distribution of hydrogen formed in a plane in part of the monocrystalline silicon substrate at a side of the plane of the peak of the concentration distribution of boron opposite to the part of the semiconductor element.

73. A semiconductor substrate which is made of monocrystalline silicon material provided with a semiconductor layer, wherein

the concentration distributions of hydrogen and boron contained in the semiconductor substrate show respective gradients from one of the surfaces of the semiconductor substrate to the other.

74. A semiconductor substrate prepared by forming a semiconductor layer and a peel layer in a monocrystalline silicon substrate, performing heat treatment to peel part of the monocrystalline silicon substrate off along the peel layer and bonding the monocrystalline silicon substrate to a glass substrate, wherein

the monocrystalline silicon substrate contains hydrogen and boron which show respective concentration distribution gradients from one of the surfaces of the monocrystalline silicon substrate to the other.

75. A semiconductor substrate comprising:

a monocrystalline silicon substrate provided with a semiconductor element including at least a semiconductor layer;

a peel layer which is formed along the semiconductor element and contains hydrogen as a peeling substance for peeling off part of the monocrystalline silicon substrate by heat treatment; and

an anti-diffusion layer which is formed between the peel layer and the semiconductor element and contains boron as a diffusion inhibiting substance for inhibiting the diffusion of hydrogen into the semiconductor element during the heat treatment.

76. A semiconductor substrate according to claim 75, wherein

the semiconductor element includes a semiconductor layer and a gate electrode, and

the concentration of the diffusion inhibiting substance in the semiconductor layer is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer facing the gate electrode.

77. A semiconductor substrate according to claim 75, wherein

the semiconductor element includes a semiconductor layer, and

the concentration of the diffusion inhibiting substance in the semiconductor layer is 1×

10¹⁷ cm<sup>−

3</sup> or less at the surface of the semiconductor layer.

78. A semiconductor substrate prepared by forming a peel layer in a monocrystalline silicon substrate, performing heat treatment to peel part of the monocrystalline silicon substrate off along the peel layer and bonding the monocrystalline silicon substrate to a glass substrate, wherein

the monocrystalline silicon substrate bonded to the glass substrate contains hydrogen and boron which show respective concentration distribution gradients from one of the surfaces of the monocrystalline silicon substrate to the other.

79. A semiconductor substrate according to claim 78, wherein

a semiconductor element formed in and on the monocrystalline silicon substrate and a semiconductor element formed on the glass substrate include respective layers formed in the same process.

80. A semiconductor substrate which is made of monocrystalline silicon material and includes a peak of the concentration distribution of hydrogen formed in a plane along the substrate surface and a peak of the concentration distribution of boron formed in a plane in part of the substrate closer to the substrate surface than the plane of the concentration distribution of hydrogen.

81. A semiconductor substrate comprising:

a peel layer which is formed in a monocrystalline silicon substrate and contains hydrogen as a peeling substance for peeling off part of the monocrystalline silicon substrate by heat treatment; and

an anti-diffusion layer which contains boron as a diffusion inhibiting substance for inhibiting hydrogen from diffusing into the monocrystalline silicon substrate which has been partially peeled off by the heat treatment.

82. A semiconductor substrate according to claim 81, wherein

the concentration of boron as the diffusion inhibiting substance in the monocrystalline silicon substrate is 1×

10¹⁷ cm<sup>−

3</sup> at the surface of the monocrystalline silicon substrate.

83. A semiconductor substrate comprising a substrate provided with an anti-diffusion layer and a peel layer both formed therein, the anti-diffusion layer inhibiting the diffusion of a peeling substance in the peel layer beyond the anti-diffusion layer during heat treatment performed to peel part of the substrate off along the peel layer.

84. A semiconductor substrate comprising a substrate provided with an anti-diffusion layer for inhibiting the diffusion of a peeling substance beyond the anti-diffusion layer and a peel layer which contains the peeling substrate, wherein

part of the substrate is peeled off along the peel layer by heat treatment.

85. A semiconductor substrate comprising a substrate provided with an anti-diffusion layer and a peel layer both formed therein,

the anti-diffusion layer inhibiting the diffusion of a peeling substance in the peel layer beyond the anti-diffusion layer during heat treatment performed to peel part of the substrate off along the peel layer after the substrate is bonded to a second substrate.

86. A semiconductor substrate according to claim 85, wherein the anti-diffusion layer is removed together with the peel layer.

87. A semiconductor substrate according to claim 85, wherein the substrate is a monocrystalline silicon substrate.

88. A semiconductor substrate comprising a substrate provided with an anti-diffusion layer for inhibiting the diffusion of a peeling substance beyond the anti-diffusion layer and a peel layer containing the peeling substance, wherein

part of the substrate is peeled off along the peel layer by heat treatment after the substrate is bonded to a second substrate.

89. A semiconductor substrate according to claim 88, wherein the anti-diffusion layer is removed together with the peel layer.

90. A semiconductor substrate according to claim 88, wherein the substrate is a monocrystalline silicon substrate.

91. A semiconductor substrate comprising a substrate and a second substrate bonded to the substrate, wherein

the substrate is formed by the steps of:

forming an anti-diffusion layer in the substrate;

activating a diffusion inhibiting substance contained in the anti-diffusion layer;

forming a peel layer in the substrate along the anti-diffusion layer; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

92. A semiconductor substrate according to claim 91, wherein the anti-diffusion layer is removed together with the peel layer.

93. A semiconductor substrate according to claim 91, wherein the second substrate is a glass substrate.

94. A semiconductor substrate according to claim 91, wherein the substrate is a monocrystalline silicon substrate.

95. A semiconductor substrate formed by the steps of:

implanting ions including boron ions into the substrate to form an anti-diffusion layer in the substrate;

activating boron contained in the anti-diffusion layer;

implanting ions including hydrogen ions into the substrate to form a peel layer in part of the substrate at a side of the anti-diffusion layer opposite to the substrate surface from which the ion implantation is carried out and along the anti-diffusion layer; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

96. A semiconductor substrate according to claim 95, wherein the anti-diffusion layer is removed together with the peel layer.

97. A semiconductor substrate according to claim 95, wherein the substrate is a monocrystalline silicon substrate.

98. A semiconductor substrate formed by the steps of:

implanting ions including boron ions into the substrate to form an anti-diffusion layer in the substrate;

activating boron contained in the anti-diffusion layer;

implanting ions including hydrogen ions into the substrate to form a peel layer in part of the substrate at a side of the anti-diffusion layer opposite to the substrate surface from which the ion implantation is carried out;

bonding the substrate to a second substrate; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

99. A semiconductor substrate according to claim 98, wherein the anti-diffusion layer is removed together with the peel layer.

100. A semiconductor substrate according to claim 98, wherein the second substrate is a glass substrate.

101. A semiconductor substrate according to claim 98, wherein the substrate is a monocrystalline silicon substrate.

102. A semiconductor substrate formed by the steps of:

forming at least part of a semiconductor element in the substrate;

implanting ions including boron ions into the substrate along the part of the semiconductor element to form an anti-diffusion layer in the substrate;

activating boron contained in the anti-diffusion layer;

implanting ions including hydrogen ions into part of the substrate at a side of the anti-diffusion layer opposite to the part of the semiconductor element to form a peel layer; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

103. A semiconductor substrate according to claim 102, wherein the anti-diffusion layer is removed together with the peel layer.

104. A semiconductor substrate-according to claim 102, wherein the substrate is a monocrystalline silicon substrate.

105. A semiconductor substrate formed by the steps of:

forming at least part of a semiconductor element in a substrate;

implanting ions including boron ions into the substrate along the part of the semiconductor element to form an anti-diffusion layer in the substrate;

activating boron contained in the anti-diffusion layer;

implanting ions including hydrogen ions into part of the substrate at a side of the anti-diffusion layer opposite to the part of the semiconductor element to form a peel layer;

bonding the substrate to a second substrate; and

heat-treating the substrate to peel part of the substrate off along the peel layer.

106. A semiconductor substrate according to claim 105, wherein the anti-diffusion layer is removed together with the peel layer.

107. A semiconductor substrate according to claim 105, wherein the second substrate is a glass substrate.

108. A semiconductor substrate according to claim 105, wherein the substrate is a monocrystalline silicon substrate.