Apparatus and method in a cached raid controller utilizing a solid state backup device for improving data availability time

• US 20050283648A1
• Filed: 02/09/2005
• Published: 12/22/2005
• Est. Priority Date: 06/21/2004
• Status: Active Grant

• Current Assignee: Dot Hill Systems Corporation (Seagate Technology Holdings Plc)
• Original Assignee: Dot Hill Systems Corporation (Seagate Technology Holdings Plc)
• Inventors: Ashmore, Paul Andrew
• Granted Patent: US 7,380,055 B2
• Time in Patent Office: Days
• US Class Current: 714/5.11
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3268 Power saving in hard disk drive
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

An apparatus for reducing data unavailability time after a loss of main power in a storage controller is described. The controller backs up its volatile memory containing posted-write data to a non-volatile memory upon detecting a loss of main power. The controller continues to provide battery power to the volatile memory to sustain the posted-write data. If the battery is able to supply power to the volatile memory until main power is restored, the controller foregoes restoring the posted-write data to the volatile memory from the non-volatile memory. By not incurring the restore time, which may be substantial if the volatile memory is large since read rates from volatile memories are typically slow, the data unavailability time is reduced. The selective restore feature is user-disableable and also includes a brown-out timer for allowing a user to specify how long to battery-power the volatile memory if the feature is enabled.

Claims

1. A mass storage controller for providing improved data availability, comprising:

a volatile memory, for storing posted-write data;

a non-volatile memory, coupled to said volatile memory, for backing up said posted-write data from said volatile memory, in response to a loss of main power;

a battery, coupled to supply power to said volatile memory in response to said loss of main power;

an indicator, for indicating whether said battery continued to supply power to said volatile memory until said main power was restored; and

control logic, coupled to said indicator, configured to forego restoring said posted-write data to said volatile memory from said non-volatile memory in response to said main power being restored, if said indicator indicates said battery continued to supply power to said volatile memory until said main power was restored.

2. The controller as recited in claim 1, wherein said control logic is further configured to restore said posted-write data to said volatile memory from said non-volatile memory in response to said main power being restored, if said indicator indicates said battery did not continue to supply power to said volatile memory until said main power was restored.

3. The controller as recited in claim 1, wherein said volatile memory comprises a dynamic random access memory (DRAM) including a self-refresh mode, wherein said control logic is configured to place said DRAM in said self-refresh mode after backing up said posted-write data from said volatile memory to said non-volatile memory.

4. The controller as recited in claim 1, wherein said control logic is configured to:

write said posted-write data to a mass storage device, after restoring said posted-write data to said volatile memory from said non-volatile memory in response to said main power being restored, if said indicator indicates said battery did not continue to supply power to said volatile memory until said main power was restored; and

alternatively to

write the posted-write data to the mass storage device, after foregoing restoring said posted-write data to said volatile memory from said non-volatile memory in response to said main power being restored, if said indicator indicates said battery continued to supply power to said volatile memory until said main power was restored.

5. The controller as recited in claim 1, wherein said non-volatile memory comprises a FLASH memory.

6. The controller as recited in claim 1, wherein said non-volatile memory comprises a disk drive.

7. The controller as recited in claim 6, wherein said disk drive comprises a micro-disk drive.

8. The controller as recited in claim 1, wherein the mass storage controller comprises a redundant array of disks (RAID) controller.

9. The controller as recited in claim 1, wherein said control logic comprises a microprocessor.

10. The controller as recited in claim 1, wherein said control logic comprises a direct memory access controller (DMAC).

11. The controller as recited in claim 1, wherein said control logic comprises a memory controller.

12. The controller as recited in claim 1, wherein said control logic comprises a bus bridge.

13. The controller as recited in claim 1, wherein said control logic comprises said indicator.

14. The controller as recited in claim 1, further comprising:

a second indicator, for indicating whether a selective restore feature of the controller is enabled;

wherein if said second indicator indicates said selective restore feature is disabled, said control logic disables power from said battery to the controller after backing up said posted-write data from said volatile memory to said non-volatile memory.

15. The controller as recited in claim 14, wherein said selective restore feature is user-enable/disableable.

16. The controller as recited in claim 1, further comprising:

a timer, coupled to said control logic, wherein said control logic is configured to start said timer running in response to said loss of main power;

wherein if said timer expires, said control logic disables power from said battery to the controller.

17. The controller as recited in claim 16, wherein an expiration time of said timer is user-programmable.

18. The controller as recited in claim 1, wherein said control logic is further configured to write a predetermined value to said indicator after said loss of main power, wherein said indicator has a property of transitioning to a value different from said predetermined value if said battery fails to provide power to said volatile memory, wherein said indicator indicates said battery continued to supply power to said volatile memory until said main power was restored if said control logic reads said predetermined value from said indicator after said main power is restored.

19. The controller as recited in claim 18, wherein said control logic foregoes restoring said posted-write data to said volatile memory from said non-volatile memory, in response to said main power being restored, if said control logic reads said predetermined value from said indicator.

20. The controller as recited in claim 18, wherein said control logic is further configured to disable power from said battery to the controller except for to said volatile memory and to a circuit comprising said indicator, after backing up said posted-write data from said volatile memory to said non-volatile memory.

21. The controller as recited in claim 1, wherein said indicator comprises:

a storage element, coupled to receive power from said battery in response to said loss of main power, configured to provide a predetermined value when read after transitioning from a non-powered state to a powered state;

wherein said control logic programs said storage element to a value other than said predetermined value in response to said loss of main power.

22. The controller as recited in claim 21, wherein said storage element, when powered by said battery, is configured to transition from said powered state to said non-powered state at least as soon as said volatile memory fails to store said posted-write data when said battery ceases to continue supplying power to said volatile memory during said loss of main power.

23. The controller as recited in claim 22, wherein said storage element, if said battery power fails, is configured to transition from said powered state to said non-powered state at least as soon as said volatile memory fails to store said posted-write data.

24. A method for improving data availability in a redundant array of disks (RAID) controller having a volatile memory for storing posted-write data, a non-volatile memory, and a battery for providing power to the controller in response to loss of main power to the controller, the method comprising:

backing up the posted-write data from the volatile memory to the non-volatile memory, in response to the loss of main power;

determining whether the battery sustained the posted-write data in the volatile memory until the main power is restored; and

restoring the posted-write data to the volatile memory from the non-volatile memory, in response to the main power being restored, only if the battery did not sustain the posted-write data in the volatile memory until the main power is restored.

25. The method as recited in claim 24, further comprising:

placing the volatile memory in self-refresh mode, after said backing up the posted-write data.

26. The method as recited in claim 25, further comprising:

taking the volatile memory out of self-refresh mode, after the main power is restored.

27. The method as recited in claim 24, further comprising:

writing the posted-write data to a mass storage device, after said restoring the posted-write data to the volatile memory from the non-volatile memory, if the battery did not sustain the posted-write data in the volatile memory until the main power was restored; and

alternatively

writing the posted-write data to the mass storage device, after said determining whether the battery sustained the posted-write data in the volatile memory until the main power is restored, if the battery sustained the posted-write data in the volatile memory until the main power was restored.

28. The method as recited in claim 24, further comprising:

determining whether a selective restore feature of the controller is enabled; and

removing the battery power to the controller, if the selective restore feature of the controller is disabled.

29. The method as recited in claim 28, further comprising:

receiving user input specifying whether the selective restore feature of the controller is enabled, prior to said determining whether the selective restore feature of the controller is enabled.

30. The method as recited in claim 24, further comprising:

starting a timer, in response to the loss of main power;

determining whether the timer has reached a time; and

removing the battery power to the controller, if the timer has reached the time.

31. The method as recited in claim 30, further comprising:

receiving user input specifying the time, prior to the loss of main power.

32. The method as recited in claim 24, further comprising:

writing a predetermined value to a storage element of the controller, in response to the loss of main power, wherein the storage element has a property of transitioning to a value different from said predetermined value if the battery fails to provide power to the volatile memory;

wherein said determining whether the battery sustained the posted-write data in the volatile memory until the main power is restored comprises determining whether the storage element has the predetermined value when the main power is restored.

33. The method as recited in claim 32, wherein said restoring the posted-write data to the volatile memory from the non-volatile memory, in response to the main power being restored, only if the battery did not sustain the posted-write data in the volatile memory until the main power is restored comprises:

restoring the posted-write data to the volatile memory from the non-volatile memory, in response to the main power being restored, only if the storage element does not have the predetermined value.

34. The method as recited in claim 32, further comprising:

disabling the battery power to the controller except for the volatile memory and a circuit comprising the storage element, after said writing the predetermined value to the storage element.

35. An apparatus for improving data availability in a write-caching controller having a volatile memory for caching posted-write data, a non-volatile memory to which a back up of the posted-write data is performed after a main power failure, and a battery for providing power while the backup is being performed, the apparatus comprising:

wherein the battery attempts to continue to provide power to the volatile memory after the backup is complete and until the main power is restored;

a storage element, for storing an indication of whether the battery successfully continued to provide power to the volatile memory until the main power was restored; and

control logic, coupled to said storage element, for restoring the posted-write data from the non-volatile memory to the volatile memory when the main is restored, only if said indication indicates the battery did not continue to provide power to the volatile memory until the main power was restored.

36. The apparatus as recited in claim 35, wherein said non-volatile memory comprises a FLASH memory.

37. The apparatus as recited in claim 35, wherein the write-caching controller comprises a RAID controller.

38. The apparatus as recited in claim 35, further comprising:

a user-programmable timer, coupled to said control logic, wherein said control logic starts said timer when the main power fails, wherein if said timer expires, said control logic disables the batter power.

39. The apparatus as recited in claim 35, further comprising:

a user-programmable flag, coupled to said control logic, for selectively disabling a selective restore feature, wherein if said flag indicates said feature is disabled, said control logic disables the batter power when the backup is complete rather than attempting to continue to provide power to the volatile memory until the main power is restored.