Design checks for signal lines

• US 20050283745A1
• Filed: 06/18/2004
• Published: 12/22/2005
• Est. Priority Date: 06/18/2004
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Sun, Ping, McRonald, Andrew, Meyer, Neal, Neal, Brett, Genz, Lee, Garrison, Gene
• Granted Patent: US 7,100,135 B2
• Time in Patent Office: Days
• US Class Current: 716/112
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

Some embodiments provide identification of a first polyline and a second polyline associated with a differential signal, determination of whether a distance between a segment of the first polyline and a segment of the second polyline is within a first tolerance, determination, if the distance is not within the first tolerance, of whether the distance is within a second tolerance, determination, if the distance is not within the first tolerance and is within the second tolerance, of whether the length of the segment of the first polyline is less than a first threshold, and to indicate that the first polyline and the second polyline are sufficiently spaced, if the distance is not within the first tolerance and is within the second tolerance, and if the length of the segment of the first polyline is less than the first threshold.

Claims

1. A method comprising:

identifying a first polyline and a second polyline associated with a differential signal;

determining whether a distance between a segment of the first polyline and a segment of the second polyline is within a first tolerance;

if the distance is not within the first tolerance, determining whether the distance is within a second tolerance;

if the distance is not within the first tolerance and is within the second tolerance, determining whether the length of the segment of the first polyline is less than a first threshold; and

indicating that the first polyline and the second polyline are sufficiently spaced if the distance is not within the first tolerance and is within the second tolerance, and if the length of the segment of the first polyline is less than the first threshold.

2. A method according to claim 1, further comprising:

if the distance is not within the second tolerance or if the length of the segment of the first polyline is greater than the first threshold, indicating that the first polyline and the second polyline are not sufficiently spaced.

3. A method according to claim 1, further comprising:

if the distance is not within the second tolerance or if the length of the segment of the first polyline is greater than the first threshold, determining whether the segments are located near a device pin; and

if the segments are not located near a device pin, indicating that the first polyline and the second polyline are not sufficiently spaced.

4. A method according to claim 1, wherein indicating comprises:

indicating that the first polyline and the second polyline are sufficiently spaced if the distance is not within the first tolerance and is within the second tolerance, if the length of the segment of the first polyline is less than the first threshold, and if the first polyline and the second polyline are sufficiently spaced from other polylines.

5. A method comprising:

marking all nodes of interest as virtual nodes;

identifying a node;

marking the node as visited;

determining if the node is a pin;

if the node is a pin, marking a path associated with the node as containing a pin;

determining if any connecting nodes are connected to the node;

incrementing a stub count if no connecting nodes are connected to the node;

recursively applying the method to all of the connecting nodes that are marked as visited;

determining if the node is a virtual node;

if the node is a virtual node, determining if there are any pins on the path;

incrementing the stub count and unmarking the node as a virtual node if there are no pins on the path;

if it is determined that there are pins on the path, determining if all of the connecting nodes have been marked as visited; and

if it is determined that all of the connecting nodes have been marked as visited, marking the node as a virtual node.

6. A method according to claim 5, further comprising:

outputting the stub count.

7. A method comprising:

identifying a set of segments of a net located in a routing layer;

identifying a segment of the set of segments;

identifying a reference shape on an adjacent conductor layer that is closest to the identified segment;

identifying first parts of the segment which correspond to the reference shape but for which the reference shape is not a correct reference net;

identifying second parts of the segment which do not correspond to the reference shape or with reference shapes of any allowable conductor layer;

combining the first and second parts into one or more connected parts;

identifying ones of the one or more connected parts that have an etch length greater than a threshold length;

marking the identified connected parts as violating a design rule;

determining whether a total etch length of the one or more connected parts is greater than a threshold value; and

if the total etch length of the one or more connected parts is greater than the threshold value, marking the one or more connected parts as violating a design rule.

8. A method according to claim 7, further comprising:

repeating the method for each other segment of the set of segments.

9. A method according to claim 8, further comprising:

repeating the method for each other set of segments of the net.

10. A method comprising:

identifying a net;

identifying a segment of the net;

determining a minimum channel spacing for the segment;

defining a polygon based on the segment and on the minimum channel spacing;

identifying segments of other nets that are overlapped by the polygon;

for at least one of the other nets, determining a cumulative parallel length between the subject segment and the identified segments; and

for the at least one of the other nets, marking the identified segments as violating a design rule if the cumulative parallel length is greater than a maximum allowable length.

11. A method according to claim 10, wherein defining the polygon comprises:

defining a capless polygon to outline the segment; and

expanding a width of the capless polygon based on the minimum channel spacing.

12. A method according to claim 11, further comprising:

repeating the method for each other segment of the net.

13. A medium storing processor-executable code, the code comprising:

code to identify a first polyline and a second polyline associated with a differential signal;

code to determine whether a distance between a segment of the first polyline and a segment of the second polyline is within a first tolerance;

code to determine, if the distance is not within the first tolerance, whether the distance is within a second tolerance;

code to determine, if the distance is not within the first tolerance and is within the second tolerance, whether the length of the segment of the first polyline is less than a first threshold; and

code to indicate that the first polyline and the second polyline are sufficiently spaced, if the distance is not within the first tolerance and is within the second tolerance, and if the length of the segment of the first polyline is less than the first threshold.

14. A medium according to claim 13, the code further comprising:

code to indicate that the first polyline and the second polyline are not sufficiently spaced, if the distance is not within the second tolerance or if the length of the segment of the first polyline is greater than the first threshold.

15. A medium storing processor-executable code, the code comprising:

code to mark all nodes of interest as virtual nodes;

code to identify a node;

code to mark the node as visited;

code to determine if the node is a pin;

code to mark, if the node is a pin, a path associated with the node as containing a pin;

code to determine if any connecting nodes are connected to the node;

code to increment a stub count if no connecting nodes are connected to the node;

code to recursively apply the method to all of the connecting nodes that are marked as visited;

code to determine if the node is a virtual node;

code to determine, if the node is a virtual node, if there are any pins on the path;

code to increment the stub count and unmark the node as a virtual node if there are no pins on the path;

code to determine, if it is determined that there are pins on the path, if all of the connecting nodes have been marked as visited; and

code to mark, if it is determined that all of the connecting nodes have been marked as visited, the node as a virtual node.

16. A medium according to claim 15, the code further comprising:

code to output the stub count.

17. A medium storing processor-executable code, the code comprising:

code to identify a set of segments of a net located in a routing layer;

code to identify a segment of the set of segments;

code to identify a reference shape on an adjacent conductor layer that is closest to the identified segment;

code to identify first parts of the segment which corresponds to the reference shape but for which the reference shape is not a correct reference net;

code to identify second parts of the segment which does not correspond to the reference shape or with reference shapes of any allowable conductor layer;

code to combine the first and second parts into one or more connected parts;

code to identify ones of the one or more connected parts that have an etch length greater than a threshold length;

code to mark the identified connected parts as violating a design rule;

code to determine whether a total etch length of the one or more connected parts is greater than a threshold value; and

code to mark, if the total etch length of the one or more connected parts is greater than the threshold value, the one or more connected parts as violating a design rule.

18. A medium according to claim 17, the code further comprising:

code to repeat the method for each other segment of the set of segments.

19. A medium according to claim 18, the code further comprising:

code to repeat the method for each other set of segments of the net.

20. A medium storing processor-executable code, the code comprising:

code to identify a net;

code to identify a segment of the net;

code to determine a minimum channel spacing for the segment;

code to define a polygon based on the segment and on the minimum channel spacing;

code to identify segments of other nets that are overlapped by the polygon;

code to determine, for at least one of the other nets, a cumulative parallel length between the subject segment and the identified segments; and

code to mark, for the at least one of the other nets, the identified segments as violating a design rule if the cumulative parallel length is greater than a maximum allowable length.

21. A method according to claim 20, wherein the code to define the polygon comprises:

code to define a capless polygon to circumscribe the segment; and

code to expand a width of the capless polygon based on the minimum channel spacing.

22. A method according to claim 21, the code further comprising:

code to repeat the method for each other segment of the net.

23. A system comprising:

a processor;

a fixed disk drive coupled to the processor and storing processor-executable code, the code comprising;

code to identify a first polyline and a second polyline associated with a differential signal;

code to determine whether a distance between a segment of the first polyline and a segment of the second polyline is within a first tolerance;

code to determine, if the distance is not within the first tolerance, whether the distance is within a second tolerance;

code to determine, if the distance is not within the first tolerance and is within the second tolerance, whether the length of the segment of the first polyline is less than a first threshold; and

code to indicate that the first polyline and the second polyline are sufficiently spaced, if the distance is not within the first tolerance and is within the second tolerance, and if the length of the segment of the first polyline is less than the first threshold; and

a double data rate memory coupled to the processor.

24. A system according to claim 23, the code further comprising:

code to indicate that the first polyline and the second polyline are not sufficiently spaced, if the distance is not within the second tolerance or if the length of the segment of the first polyline is greater than the first threshold.