Low inductance semiconductor device having half-bridge configuration

• US 20060001146A1
• Filed: 06/02/2005
• Published: 01/05/2006
• Est. Priority Date: 06/03/2004
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Schilling, Oliver, Passe, Thomas
• Granted Patent: US 7,279,963 B2
• Time in Patent Office: Days
• US Class Current: 257/690
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/4813 Connecting within a semiconductor or solid-state body, i.e. fly wire, bridge wire
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48139 with an intermediate bond, e.g. continuous wire daisy chain
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4846 with multiple bonds on the same bonding area
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/072 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01074 Tungsten [W]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/30107 : Inductance

Abstract

A semiconductor device has connecting leads, whose base points (1f, 2f, 3f) have centroids (1m, 2m, 3m), wherein the connecting line between the centroids (1m, 3m) of the base points (1f, 3f) of the first (1) and third (3) connecting lead, and the connecting line between the centroids (2m, 3m) of the base points (2f, 3f) of the second (2) and third (3) connecting lead enclose an angle (α) of 20° maximum. In addition, a semiconductor module may incorporate two or more semiconductor devices which are connected electrically in parallel.

Claims

1. A semiconductor device comprising a first and a second element of a half-bridge, which are arranged on a common substrate having tracks, and having a first, a second and a third connecting lead, wherein

the first element of the half-bridge comprises at least a first semiconductor element and a first freewheeling component,

the second element of the half-bridge comprises at least a second semiconductor element and a second freewheeling component,

the first connecting lead is connected by an electrically conducting connection to the first semiconductor element and the second connecting lead to the second semiconductor element,

the first and the second connecting lead are used for DC supply and are arranged parallel to each other, at least in parts,

the third connecting lead constitutes a load terminal of the half-bridge,

the first, second and third connecting lead each have a base point facing the substrate, and wherein

the connecting line between centroids of the base points of the first and third connecting lead, and the connecting line between the centroids of the base points of the second and third connecting lead enclose an angle of 20°

maximum.

2. A semiconductor device according to claim 1, wherein the connecting line of the centroids of the first semiconductor element and the first freewheeling component, and the connecting line of the centroids of the second semiconductor element and the second freewheeling component enclose an angle of 20°

maximum.

3. A semiconductor device according to claim 1, wherein the first connecting lead encloses the second connecting lead, at least in parts, in an angle of at least 180°

.

4. A semiconductor device according to claim 1, wherein the first connecting lead and the second connecting lead are arranged, at least in parts, at least approximately coaxially with each other.

5. A semiconductor device according to claim 1, wherein at least one of the connecting leads has a planar design.

6. A semiconductor device according to claim 1, wherein the distance between the first and the second connecting lead is less than 3.0 mm.

7. A semiconductor device according to claim 1, wherein at least one of the semiconductor elements is designed as an IGBT or a MOSFET.

8. A semiconductor device according to claim 1, wherein part of the third connecting lead is sandwiched between the first and the second semiconductor element, and is electrically connected to them by an electrically conducting connection.

9. A semiconductor module having at least one first and one second semiconductor device as claimed in claim 1 in each case, which are arranged on a common substrate and connected electrically in parallel.

10. A semiconductor device according to claim 9, wherein the first and second connecting leads of the first and second semiconductor device run at least in parts parallel to each other.

11. A semiconductor device according to claim 9, wherein the two first connecting leads and the two second connecting leads form a pair, respectively;

wherein the pairs are arranged crosswise, and the connecting leads of the same pair have the same polarity.

12. A semiconductor device according to claim 9, comprising at least one first, second and third conducting rail for connecting the semiconductor devices electrically in parallel, wherein the connecting leads and/or electrical connections required for the parallel circuit are implemented by the at least one first, second and third conducting rail.

13. A semiconductor device according to claim 12, wherein at least the first and second conducting rail run parallel to each other.

14. A semiconductor device according to claim 13, wherein the third conducting rail runs parallel to the first and second conducting rail, and wherein the semiconductor element is arranged between the third conducting rail and the pair of the first and the second conducting rail.

15. A semiconductor device having a half-bridge arranged on a common substrate comprising

a first element arranged on the common substrate comprising at least a first semiconductor element and a first freewheeling component,

a second element arranged on the common substrate comprising at least a second semiconductor element and a second freewheeling component,

a first connecting lead coupled by an electrically conducting connection with the first semiconductor element and a second connecting lead coupled with the second semiconductor element, wherein the first and the second connecting lead are at least partly arranged in parallel to each other, and

a third connecting lead, wherein the first, second and third connecting lead each have a base point facing the common substrate, and wherein a connecting line between centroids of the base points of the first and third connecting lead, and a connecting line between the centroids of the base points of the second and third connecting lead enclose an angle of 20°

maximum.

16. A semiconductor device according to claim 15, wherein the connecting line of the centroids of the first semiconductor element and the first freewheeling component, and the connecting line of the centroids of the second semiconductor element and the second freewheeling component enclose an angle of 20°

maximum.

17. A semiconductor device according to claim 15, wherein the first connecting lead encloses the second connecting lead, at least in parts, in an angle of at least 180°

.

18. A semiconductor device according to claim 15, wherein the first connecting lead and the second connecting lead are arranged, at least in parts, at least approximately coaxially with each other.

19. A semiconductor device according to claim 15, wherein at least one of the connecting leads has a planar design.

20. A semiconductor module having at least one first and one second semiconductor device which are arranged on a common substrate and connected electrically in parallel, wherein the common substrate comprises for each semiconductor device:

a first element arranged on the common substrate comprising at least a first semiconductor element and a first freewheeling component,

a second element arranged on the common substrate comprising at least a second semiconductor element and a second freewheeling component,

a first connecting lead coupled by an electrically conducting connection with the first semiconductor element and a second connecting lead coupled with the second semiconductor element, wherein the first and the second connecting lead are at least partly arranged in parallel to each other, and

a third connecting lead, wherein the first, second and third connecting lead each have a base point facing the common substrate, and wherein a connecting line between centroids of the base points of the first and third connecting lead, and a connecting line between the centroids of the base points of the second and third connecting lead enclose an angle of 20°

maximum.