Frame buffer pixel circuit for liquid crystal display
First Claim
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1. A circuit for controlling a pixel electrode of a display, comprising:
- an amplification circuitry having an input and an output;
a first controller enabled by a first control signal to store a first analog data signal containing pixel data in a first storage unit either coupled to the input of the amplification circuitry, or formed by a parasitic capacitance present between the input and the output of the amplification circuitry;
a second controller enabled by a second control signal to couple the output of the amplification circuitry to a second storage unit thereby storing a second analog data signal proportional to the first analog data signal in the second storage unit; and
the second storage unit directly coupled to a pixel electrode to control a pixel value corresponding to the second analog data signal;
the amplification circuitry and the second controller provide isolation between the first storage unit and the second storage unit.
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Abstract
An enhanced frame buffet pixel circuit with two control transistors and a separate capacitor put in as a memory capacitor before the memory transistor yields a high contrast ratio by removing induced charge and solving a charge sharing problem between the memory capacitor and the liquid crystal display (LCD) capacitor. The memory transistor may be made of either CMOS or PMOS. The frame buffer pixel can be used to drive binary displays which expresses ON and OFF only if a comparator is put in after the pixel electrode circuit to represent gray levels with reduced sub-frame frequency.
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Citations
29 Claims
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1. A circuit for controlling a pixel electrode of a display, comprising:
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an amplification circuitry having an input and an output;
a first controller enabled by a first control signal to store a first analog data signal containing pixel data in a first storage unit either coupled to the input of the amplification circuitry, or formed by a parasitic capacitance present between the input and the output of the amplification circuitry;
a second controller enabled by a second control signal to couple the output of the amplification circuitry to a second storage unit thereby storing a second analog data signal proportional to the first analog data signal in the second storage unit; and
the second storage unit directly coupled to a pixel electrode to control a pixel value corresponding to the second analog data signal;
the amplification circuitry and the second controller provide isolation between the first storage unit and the second storage unit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A circuit for controlling a pixel electrode of a display, comprising:
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an amplification circuitry having an input and an output;
a first controller enabled by a first control signal to store a first analog data signal containing pixel data in a first storage unit coupled to the input of the amplification circuitry; and
a second controller enabled by a second control signal to activate the amplification circuitry to charge a second storage unit with a second analog data signal in proportion to the first analog data signal stored in the first storage unit;
the second storage unit coupled directly to a pixel electrode to control a pixel value corresponding to the second analog data signal. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A circuit for controlling a pixel electrode of a display, comprising:
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a first controller enabled by a first control signal to store a first analog data signal containing pixel data in a first storage unit;
a second controller enabled by a second control signal to charge a second storage unit with a second analog data signal in proportion to the first analog data signal stored in the first storage unit; and
an analog to pulse width modulation (PWM) converter coupled between the second storage unit and the pixel electrode;
wherein the PWM converter modulates the second analog data signal with a reference signal having a period to control the amount of on and off time of the voltage of the second analog data signal applied to the pixel electrode during the period; and
wherein the reference voltage is comprised of a wave form that does not have an inflection point thereby causing the second analog data signal to be switched only one time during a period. - View Dependent Claims (26)
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27. A method of controlling a pixel electrode of a display, comprising the steps of:
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generating a first control signal;
storing a first analog data signal containing pixel data in a first storage unit either coupled to an amplification circuitry or formed by the parasitic capacitance of the amplification circuitry, in response to the first control signal;
generating a second control signal to a control unit which is coupled to an output of the amplification circuitry;
charging a second storage unit with a second analog data signal provided by the control unit in proportion to the first analog data signal stored in the first storage unit in response to the second control signal;
isolating the first storage unit and the second storage unit using the amplification circuitry; and
controlling a pixel value corresponding to the second analog data signal coupled to a pixel electrode in the display that is directly coupled to the second storage unit.
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28. A method of controlling a pixel electrode of a display, comprising the steps of:
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generating a first control signal;
storing a first analog data signal containing pixel data in a first storage unit coupled to an input of an amplification circuitry in response to the first control signal;
generating a second control signal;
activating the amplification circuitry to charge a second storage unit with a second analog data signal in proportion to the first analog data signal stored in the first storage unit in response to the second control signal; and
controlling a pixel value corresponding to the second analog data signal on a pixel electrode in the display that is directly coupled to the second storage unit.
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29. A method of controlling a pixel electrode of a display, comprising the steps of:
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generating a first control signal;
storing a first analog data signal containing pixel data in a first storage unit in response to the first control signal;
generating a second control signal;
charging a second storage unit with a second analog data signal in proportion to the first analog data signal stored in the first storage unit in response to the second control signal;
generating a modulation reference signal having a period wherein the reference signal does not have an inflection point over the entire period;
modulating the second analog data signal with the reference signal having a period to generate a pulse width modulated (PWM) signal comprised of the second analog data signal switch on only once per period as a result of the reference signal not having an inflection point; and
applying the PWM signal to the pixel electrode to control the amount of on and off time of the voltage of the second analog data signal applied to a pixel electrode during the period.
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Specification