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Method and apparatus to detect invalid data in a nonvolatile memory following a loss of power

  • US 20060002197A1
  • Filed: 06/30/2004
  • Published: 01/05/2006
  • Est. Priority Date: 06/30/2004
  • Status: Abandoned Application
First Claim
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1. A method, comprising:

  • setting at least one power loss recovery (PLR) status bit in response to the writing to or erasing of a plurality of nonvolatile memory cells of a nonvolatile memory, wherein the at least one PLR status bit indicates whether the writing to or erasing of the plurality of memory cells was interrupted by a loss of power and wherein the setting of the at least one PLR status bit is performed by the nonvolatile memory.

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