Assessing energy requirements for a refreshed device

• US 20060002220A1
• Filed: 07/02/2004
• Published: 01/05/2006
• Est. Priority Date: 07/02/2004
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Spengler, David L.
• Granted Patent: US 7,321,521 B2
• Time in Patent Office: Days
• US Class Current: 365/222
• CPC Class Codes: G11C 11/401 forming cells needing refreshing or charge regeneration, i.e. dynamic cells
• CPC Class Codes: G11C 11/406 Management or control of the refreshing or charge-regeneration cycles
• CPC Class Codes: G11C 11/40615 Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
• CPC Class Codes: G11C 2211/4061 Calibration or ate or cycle tuning
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/50 Marginal testing, e.g. race, voltage or current testing
• CPC Class Codes: G11C 29/50016 of retention

Abstract

Method and apparatus for assessing a time interval during which a refresh device can be maintained in a self-refresh mode by an associated energy source. The refresh device is initially operated in a self-refresh mode to maintain the device in a selected state. The time interval during which the refresh device can be subsequently maintained in the refresh mode is next determined in relation to an energy requirement value obtained during the self-refresh mode and an energy capacity value from the associated energy source. The energy capacity value is preferably obtained by fully discharging the associated energy source. Preferably, the refresh device is characterized as a dynamic random access memory (DRAM), and the associated energy source is characterized as a rechargeable backup battery. A selected test pattern is preferably written to the refresh device and maintained thereby during the self-refresh mode.

Claims

1. A method comprising steps of operating a refresh device in a self-refresh mode to maintain the device in a selected state, and determining a time interval during which the device can be subsequently maintained in said refresh mode in relation to an energy requirement value obtained during the operating step and an energy capacity value from an associated energy source.

2. The method of claim 1, wherein the refresh mode of the operating step comprises assessing a nominal charge level of the device and repetitively supplying additional charge to the device to maintain said nominal charge level.

3. The method of claim 1, comprising a prior step of transitioning the device from an operational mode wherein a charge level of the device is selectively altered by a second device to said self-refresh mode wherein the device is decoupled from the second device and maintains a selected charge level.

4. The method of claim 1, further comprising a step of obtaining the energy capacity value from the associated energy source by discharging the associated energy source through a load.

5. The method of claim 4, wherein energy is supplied to the device during the operating step from a first energy source, wherein the associated energy source is characterized as comprising a backup battery which is selectively recharged by the first energy source, and wherein the obtaining step comprises selectively inhibiting said recharging of the backup battery by the first energy source while the backup battery is discharged through said load.

6. The method of claim 1, wherein the energy requirement value is obtained in relation to a current sense resistor coupled to the device.

7. The method of claim 1, wherein the determining step further comprises further deriving the time interval in relation to a previous energy requirement value obtained during a previous operation of the operating step.

8. The method of claim 1, wherein the device is characterized as comprising a dynamic random access memory (DRAM).

9. The method of claim 7, wherein the operating step further comprises writing a selected test pattern to the DRAM, wherein the DRAM maintains said test pattern during said self-refresh mode.

10. An apparatus configured to carry out the method of claim 1.

11. An apparatus comprising a refresh device, an associated energy source and a control block adapted to operate the refresh device in a self-refresh mode to maintain the device in a selected state, to obtain an energy requirement value for the device during said self-refresh mode, and to determine a time interval during which the device can be subsequently maintained in said refresh mode in relation to the energy requirement value and an energy capacity value from the associated energy source.

12. The apparatus of claim 11, wherein during the self-refresh mode the refresh device assesses a nominal charge level stored therein and repetitively applies additional charge to maintain said nominal charge level.

13. The apparatus of claim 11, wherein the control block is further adapted to transition the refresh device from an operational mode wherein a charge level of the refresh device is selectively altered by a second device to said self-refresh mode, wherein during said self-refresh mode the refresh device is decoupled from the second device and continuously maintains a selected charge level.

14. The apparatus of claim 11, wherein the control block is further adapted to discharge the associated energy source through a load to obtain the energy capacity value.

15. The apparatus of claim 14, further comprising a first energy source configured to supply energy to the refresh device, wherein the associated energy source is characterized as comprising a backup battery which is selectively recharged by the first energy source, and wherein the control block further inhibits said recharging of the backup battery by the first energy source while the backup battery is discharged through said load.

16. The apparatus of claim 11, further comprising a current sense resistor coupled to the refresh device, wherein the control block determines the energy requirement value in relation to a voltage drop across said resistor.

17. The apparatus of claim 11, wherein the refresh device is characterized as comprising a cache memory device used to temporarily store data transferred between a data storage device and a host device.

18. The apparatus of claim 11, further comprising a voltage regulator which regulates input energy supplied to the refresh device during the self-refresh mode, wherein the control block further determines an efficiency of the voltage regulator during said self-refresh mode.

19. The apparatus of claim 17, wherein the control block is further adapted to write a selected test pattern to the DRAM prior to operation of the DRAM in the self-refresh mode so that the DRAM refreshes the selected test pattern during the self-refresh mode.

20. An apparatus comprising a refresh device, an associated energy source and first means for determining a time interval during which the refresh device can be subsequently maintained in a self-refresh mode by the associated energy source.