Transparent amorphous carbon structure in semiconductor devices

• US 20060003237A1
• Filed: 08/30/2005
• Published: 01/05/2006
• Est. Priority Date: 09/12/2003
• Status: Abandoned Application

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Yin, Zhiping, Li, Weimin
• Application Number:
  US11/215,532
• Publication Number:
  US 20060003237A1
• Time in Patent Office: Days
• US Class Current: 430/5
• CPC Class Codes: H01L 21/02115 the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/0214 the material being a silicon oxynitride, e.g. SiON or SiON:H
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02439 Materials
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/02527 Carbon, e.g. diamond-like carbon
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/0332 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/3081 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/3146 Carbon layers, e.g. diamond-like layers
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor

Abstract

A transparent amorphous carbon layer is formed. The transparent amorphous carbon layer has a low absorption coefficient such that the amorphous carbon is transparent in visible light. The transparent amorphous carbon layer may be used in semiconductor devices for different purposes. The transparent amorphous carbon layer may be included in a final structure in semiconductor devices. The transparent amorphous carbon layer may also be used as a mask in an etching process during fabrication of semiconductor devices.

Claims

1. A system comprising:

a chamber; and

a semiconductor device including a substrate, the substrate having at least one alignment mark, a device structure over the substrate, and

an amorphous carbon layer over the substrate, wherein the amorphous carbon layer is transparent to electromagnetic radiation having wavelengths between 400 nanometers and 700 nanometers for improving a reading of the alignment mark.

2. The system of claim 1, wherein the chamber is set to a temperature from about 200°

C. to below about 300°

C. when the amorphous carbon layer is formed.

3. The system of claim 2, wherein the chamber includes propylene when the amorphous carbon layer is formed.

4. The system of claim 1, wherein the second amorphous carbon layer has a thickness greater than 4000 Angstroms for etching the device structure without substantially affecting the reading of the alignment mark.

5. The system of claim 1, wherein the substrate includes a plurality of doped regions, and wherein the device structure includes a plurality of gate structures, a plurality of contacts, each of the contacts being located between two gate structures and contacting one of the doped regions.

6. The system of claim 5, wherein the semiconductor device further includes an oxide layer over the amorphous carbon layer.

7. The system of claim 6, wherein the chamber is set for depositing the oxide layer in situ with the amorphous carbon layer.

8. The system of claim 6, wherein the semiconductor device further includes a photoresist layer over the oxide layer.

9. The system of claim 8, wherein the semiconductor device further includes an antireflective layer between the oxide layer and the photoresist layer.

10. The system of claim 8, wherein the photoresist layer includes at least one opening.

11. The system of claim 10, wherein the oxide layer includes at least one opening continuous with the opening of the photoresist layer

12. The system of claim 11, wherein the amorphous carbon layer includes at least one opening continuous with the opening of the oxide layer and the opening of the photoresist layer.

13. The system of claim 12, wherein the chamber is a plasma enhanced vapor chemical deposition chamber.

14. A system comprising:

a chamber; and

at least one memory device in the chamber, the memory device including a substrate with a plurality of doped regions, a plurality of gate structures over the substrate, an insulating layer over the gate structures, a plurality of contacts, each of the contacts being located between two gate structures, each of the contacts extending through the insulating layer and contacting one of the doped regions, and an amorphous carbon layer over the substrate, wherein the amorphous carbon layer has an absorption coefficient between about 0.15 and about 0.001 at a wavelength of 633 nanometers.

15. The system of claim 14, wherein the chamber is set to a temperature from about 200°

C. to about 500°

C. when the amorphous carbon layer is formed.

16. The system of claim 15, wherein the chamber is set to a pressure range of about 4 Torr to about 6.5 Torr, and a radio frequency power range of about 450 Watts to about 1000 Watts when the amorphous carbon layer is formed.

17. The system of claim 16, wherein the chamber includes propylene when the amorphous carbon layer is formed.

18. The system of claim 17, wherein the chamber includes helium when the amorphous carbon layer is formed.

19. The system of claim 14, wherein the insulating layer include a glass layer.

20. The system of claim 19, wherein one of the gate structures and a pair of doped regions of the plurality of doped regions are parts of a transistor.

21. The system of claim 20, wherein a first doped region of the pair of doped regions is a part of a capacitor plate.

22. The system of claim 21, wherein a second doped region of the pair of doped regions is coupled to a bit line via one of the contacts.

23. A system comprising:

a chamber; and

at least one memory device in the chamber, the memory device including a substrate with a plurality of doped regions, a plurality of gate structures over the substrate, a glass layer over the gate structures, a barrier layer between the gate structures and the glass layer for preventing cross-diffusion between the gate structures and the glass layer, a plurality of contacts, each of the contacts being located between two gate structures and contacting one of the doped regions, and an amorphous carbon layer over the substrate, wherein the amorphous carbon layer is transparent to electromagnetic radiation having wavelengths between 400 nanometers and 700 nanometers.

24. The system of claim 23, wherein the chamber is set to a temperature range of about 200°

C. to about 500°

C. when the amorphous carbon layer is formed.

25. The system of claim 24, wherein the chamber is set to a pressure range of about 4 Torr to about 6.5 Torr, and a radio frequency power range of about 450 Watts to about 1000 Watts when the amorphous carbon layer is formed.

26. The system of claim 25, wherein the chamber includes propylene and helium when the amorphous carbon layer is formed.

27. The system of claim 23, wherein the memory device further includes a hydrogenated silicon oxynitride formed directly over the amorphous carbon layer.

28. The system of claim 27, wherein the memory device further includes a photoresist layer formed directly over the hydrogenated silicon oxynitride layer.

29. The system of claim 28, wherein the photoresist layer includes at least one opening.

30. The system of claim 29, wherein the silicon oxynitride layer includes at least one opening continuous with the opening of the photoresist layer.

31. The system of claim 30, wherein the amorphous carbon layer includes at least one opening continuous with the opening of the silicon oxynitride layer.

32. A system comprising:

a chamber; and

a memory device in the chamber, the memory device including a substrate, a device structure having a first amorphous carbon layer over the substrate, a second amorphous carbon layer over device structure, an oxide layer over the second amorphous carbon layer, and a photoresist layer over the oxide layer, wherein the second amorphous carbon layer has an absorption coefficient between about 0.15 and about 0.001 at a wavelength of 633 nanometers.

33. The system of claim 32, wherein the chamber is set to a temperature range of about 200°

C. to about 500°

C. when the second amorphous carbon layer is formed.

34. The system of claim 33, wherein the chamber is set to a pressure range of about 4 Torr to about 6.5 Torr, and a radio frequency power range of about 450 Watts to about 1000 Watts when the second amorphous carbon layer is formed.

35. The system of claim 34, wherein the chamber includes propylene and helium when the amorphous carbon layer is formed, and wherein the chamber is set for receiving the propylene at a flow rate of between 500 standard cubic centimeters per minute (sccm) and 4000 sccm, and the helium at a flow rate of between 250 sccm and 1000 sccm.

36. The system of claim 32, wherein the chamber is set for depositing the oxide layer in situ with the second amorphous carbon layer.

37. The system of claim 32, wherein the first amorphous carbon layer has an absorption coefficient between about 0.15 and about 0.001 at a wavelength of 633 nanometers.

38. The system of claim 32, wherein the photoresist layer includes at least one opening, wherein the oxide layer includes at least one opening continuous with the opening of the photoresist layer, and wherein the second amorphous carbon layer includes at least one opening continuous with the opening of the oxide layer.

39. A system comprising:

a chamber; and

a wafer in the chamber, the wafer including at least one semiconductor device, wherein the semiconductor device includes a substrate having a plurality of doped regions, a device structure over the substrate, the device structure including a plurality of gate structures, at least one of the gate structures including a first amorphous carbon layer, a plurality of contacts, each of the contacts being located between two gate structures and contacting one of the doped regions, a second amorphous carbon layer over the device structure, an oxide layer formed directly over the second amorphous carbon layer, and a photoresist layer formed directly over the oxide layer, wherein the amorphous carbon layer is transparent in visible light range.

40. The system of claim 39, wherein the chamber is a plasma enhanced vapor chemical deposition chamber.

41. The system of claim 39, wherein the chamber is set for depositing the oxide layer in situ with the second amorphous carbon layer.

42. The system of claim 39, wherein chamber is set to a temperature range of about 200°

C. to about 500°

C., a pressure range of about 4 Torr to about 6.5 Torr, and a radio frequency power range of about 450 Watts when the second amorphous carbon layer is formed.

43. The system of claim 42, wherein the chamber is set to a temperature range of about 200°

C. to about 500°

C. when the first amorphous carbon layer is formed.

44. The system of claim 39, wherein the photoresist layer includes at least one opening, wherein the oxide layer includes at least one opening continuous with the opening of the photoresist layer, and wherein the second amorphous carbon layer includes at least one opening continuous with the opening of the oxide layer.

45. A system comprising:

a chamber; and

a wafer place in the chamber, the wafer including a die, the die including a substrate, a device structure formed over the substrate, and a masking structure formed over the device structure, the masking structure including an amorphous carbon layer, wherein the amorphous carbon layer is transparent in visible light range, and wherein the chamber is set at a temperature between about 200°

C. and about 500°

C. when the amorphous carbon layer is formed.

46. The system of claim 45, wherein the amorphous carbon layer has a thickness greater than 4000 Angstroms.

47. The system of claim 46, wherein the device structure has a thickness greater than 40000 Angstroms.

48. The system of claim 47, wherein the masking structure further includes a silicon oxynitride layer formed over the amorphous carbon layer.

49. The system of claim 45, wherein the masking structure further includes a photoresist layer.

50. The system of claim 49, wherein the masking structure further includes an antireflective layer.

51. The system of claim 49, wherein the photoresist layer includes at least one opening.

52. The system of claim 51, wherein the amorphous carbon layer includes at least one opening continuous with the opening of the photoresist layer.

53. The system of claim 45, wherein the device structure includes a conductive layer.

54. The system of claim 53, wherein the device structure further includes an insulating layer.

55. The system of claim 54, wherein the device structure further includes an antireflective layer.

56. The system of claim 55, wherein the device structure further includes an amorphous carbon layer.

57. The system of claim 56, wherein the masking structure further includes a photoresist layer.

58. The system of claim 57, wherein the masking structure further includes an antireflective layer.

59. The system of claim 45, wherein the die includes circuitry for a memory device.

60. The system of claim 45, wherein the die includes circuitry for a processor.

61. The system of claim 45, wherein the chamber is a plasma enhanced vapor chemical deposition chamber.

62. A method comprising:

forming an amorphous carbon layer in which the amorphous carbon layer is transparent in visible light range, wherein forming an amorphous carbon layer is performed in a chamber with a temperature above 200°

C. and below 500°

C., a pressure range of about 4 Torr to about 6.5 Torr, an radio frequency power range of about 450 Watts to about 1000 Watts, and a mixture of gas including propylene.

63. The method of claim 62, wherein forming an amorphous carbon layer includes forming the amorphous carbon layer having a thickness greater than 4000 Angstroms.

64. The method of claim 62, wherein the mixture of gas further includes helium.

65. The method of claim 64, wherein the propylene is introduced into the chamber at a flow rate of between 500 standard cubic centimeters per minute (sccm) and 4000 sccm.

66. The method of claim 65, wherein the helium is introduced into the chamber at a flow rate of between 250 sccm and 1000 sccm.