Gap-filling for isolation

• US 20060003546A1
• Filed: 06/30/2004
• Published: 01/05/2006
• Est. Priority Date: 06/30/2004
• Status: Abandoned Application

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Klipp, Andreas, Haupt, Moritz, Stavrev, Momtchil
• Application Number:
  US10/881,717
• Publication Number:
  US 20060003546A1
• Time in Patent Office: Days
• US Class Current: 438/431
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264
• CPC Class Codes: H01L 21/76235 trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS

Abstract

A method of filling high ratio trenches on a substrate is described. First, an oxidizable layer is deposited on the substrate. Thereafter, a trench fill oxide is deposited on the substrate and on the oxidizable layer. Afterwards, the resulting structure is annealed using an oxygen containing gas such that the oxidizable layer is oxidized.

Claims

1. A method for filling a gap during integrated circuit production, the method comprising:

depositing an oxidizable layer on a substrate having a gap with sidewalls;

depositing a gap fill oxide over said substrate and over said oxidizable layer; and

annealing the resulting structure using an oxygen containing gas such that the oxidizable layer is oxidized.

2. Method according to claim 1, wherein the thickness of said oxidizable layer is chosen such that its increase during oxidation corresponds to an estimated shrinkage of the gap fill oxide during the anneal step.

3. Method according to claim 2, wherein said oxidizable layer comprises a semiconductor layer.

4. Method according to claim 3, wherein said semiconductor layer comprises a silicon layer and wherein the silicon layer is oxidized to form silicon oxide during the anneal step.

5. Method according to claim 4, wherein the silicon layer comprises an amorphous silicon layer.

6. Method according to claim 5, and further comprising depositing an oxide liner over said substrate prior to depositing said amorphous silicon layer.

7. Method according to claim 6, wherein said oxide liner is etched such that the remaining liner is thicker next to a bottom of the gap than next to a top of the gap.

8. Method according to claim 7, wherein said oxide liner is approximately V-shaped in cross section.

9. Method according to claim 8, wherein said oxide liner and/or said gap fill oxide is deposited using a process gas containing Tetraethylorthosilane or Tetraethyoxysilane.

10. Method according to claim 9, wherein said oxide liner and/or said gap fill oxide is deposited using a LPTEOS-process.

11. Method according to claim 10, wherein said anneal step is carried out in a steam environment.

12. Method according to claim 1, and further comprising depositing an oxide liner over said substrate prior to depositing said oxidizable layer.

13. Method according to claim 12, wherein said oxide liner is etched such that the thickness of the remaining liner is larger next to a bottom of the gap than next to a top of the gap.

14. Method according to claim 13, wherein said oxide liner is approximately V-shaped in cross section.

15. Method according to claim 14, wherein said oxide liner and/or said gap fill oxide is deposited using a process gas containing Tetraethylorthosilane or Tetraethyoxysilane.

16. Method according to claim 15, wherein said step of annealing is carried out in a steam environment.

17. Method according to claim 1, wherein said anneal step is carried out in a steam environment.

18. Method according to claim 1, wherein the gap is formed as a trench.

19. Method according to claim 18, wherein the gap comprises an isolation trench formed in a silicon substrate.

20. Method according to claim 1, wherein the substrate comprises a plurality of gaps and wherein depositing an oxidizable layer comprises depositing an oxidizable layer over each of the gaps and wherein depositing a gap fill oxide comprises filling each of the gaps.