Network interface controller signaling of connection event

• US 20060004933A1
• Filed: 06/30/2004
• Published: 01/05/2006
• Est. Priority Date: 06/30/2004
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Vasudevan, Anil, Sen, Sujoy, Cornett, Linden
• Application Number:
  US10/883,362
• Publication Number:
  US 20060004933A1
• Time in Patent Office: Days
• US Class Current: 710/48
• CPC Class Codes: H04L 69/12 Protocol engines
• CPC Class Codes: H04L 69/16 Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
• CPC Class Codes: H04L 69/161 Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields

Abstract

In general, in one aspect, the disclosure describes a method that includes determining, at a first processor in a multi-processor system, that a network connection event is associated with a connection mapped to a second processor in the multi-processor system. In response, a network interface controller of the system is caused to signal an interrupt to the second processor.

Claims

1. A method, comprising:

determining, at a first processor in a multi-processor system, that a network connection event is associated with a connection mapped to a second processor in the multi-processor system; and

in response, causing a network interface controller of the system to signal an interrupt to the second processor.

2. The method of claim 1, wherein the network connection comprises a Transmission Control Protocol (TCP) connection.

3. The method of claim 1, wherein the event comprises at least one selected from the group of:

a transmit operation and connection teardown.

4. The method of claim 1, further comprising setting data of the network interface controller to identify the interrupt cause.

5. The method of claim 4, wherein the setting data comprises setting a bit identifying software interrupt generation.

6. The method of claim 1, wherein the determining the event is associated with a connection mapped to the second processor comprises determining based on a data included within a Transmission Control Protocol/Internet Protocol (TCP/IP) packet, the data including, at least, an Internet Protocol source and destination address and a TCP source and destination port.

7. The method of claim 1, wherein causing the network interface controller to signal an interrupt comprises causing the network interface controller to signal an interrupt to multiple processors in the multi-processor system including the second processor.

8. The method of claim 1, further comprising queuing an entry for the event in at least one selected from the following group:

a processor specific queue and a connection specific queue.

9. The method of claim 8, further comprising:

receiving the interrupt at the different processor; and

dequeuing an entry for the event at the second processor.

13. The apparatus of claim 1, further comprising instructions to queue an entry for the event in at least one selected from the following group:

a processor specific queue and a connection specific queue.

10. An apparatus, comprising:

a chipset;

at least one network interface controller coupled to the chipset;

multiple processors coupled to the chipset; and

instructions, disposed on a computer readable medium, to cause one or more of the multiple processors to perform operations comprising;

determining that an event associated with a Transmission Control Protocol (TCP) connection is mapped to a second one of the processors; and

in response, causing the at least one network interface controller signal an interrupt to the second processor.

11. The apparatus of claim 10, wherein the instructions further comprise instructions to set a bit in an interrupt cause register of the network interface controller.

12. The apparatus of claim 10, wherein the determining the event is associated with a connection mapped to the second processor comprises determining based on data included within a Transmission Control Protocol/Internet Protocol (TCP/IP) packet, the data including, at least, an Internet Protocol source and destination address and a TCP source and destination port.

14. The apparatus of claim 10, further comprising instructions to:

receive an interrupt; and

dequeue an entry for an event.

15. A computer program, disposed on a computer readable medium, the program including instructions for causing a processor to:

determine that a network connection event is associated with a connection mapped to a second processor in a multi-processor system; and

in response, cause a network interface controller of the system to signal an interrupt to the second processor.

16. The program of claim 15, wherein the network connection comprises a Transmission Control Protocol (TCP) connection.

17. The program of claim 15, wherein the event comprises at least one selected from the group of:

a transmit operation and a connection teardown.

18. The program of claim 15, wherein the instructions further comprise instructions to set a bit in an interrupt register of the network interface controller.

19. The program of claim 15, wherein the instructions to determine the event is associated with a connection mapped to a different processor comprise instructions to determine based on data included within a Transmission Control Protocol/Internet Protocol (TCP/IP) packet, the data including, at least, an Internet Protocol source and destination address and a TCP source and destination port.

20. The program of claim 15, further comprising instructions to cause the processor to queue an entry for the event in at least one selected from the following group:

a processor specific queue and a connection specific queue.