Method and apparatus to alter code in a memory

• US 20060004951A1
• Filed: 06/30/2004
• Published: 01/05/2006
• Est. Priority Date: 06/30/2004
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Rudelic, John C., Srinivasan, Sujaya
• Application Number:
  US10/882,858
• Publication Number:
  US 20060004951A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory

Abstract

Briefly, in accordance with an embodiment of the invention, a method and apparatus to alter code in a memory is provided. The method may include selecting a first block from a plurality of unmapped blocks in a nonvolatile memory to add or delete code in the nonvolatile memory. The apparatus may include a control circuit to select a first block from a plurality of unmapped blocks in a nonvolatile memory based on a cycle count of the first block to add or delete code in the nonvolatile memory. Other embodiments are described and claimed.

Claims

1. A method, comprising:

selecting a first block from a plurality of unmapped blocks in a nonvolatile memory to add or delete code in the nonvolatile memory.

2. The method of claim 1, further comprising mapping the first block to a physical address so that the code is stored contiguously in one or more blocks in the nonvolatile memory.

3. The method of claim 1, wherein selecting includes selecting the first block from the plurality of unmapped blocks in the nonvolatile memory based on an erase cycle count of the first block.

4. The method of claim 1, wherein selecting comprises:

examining a cycle count of each of the plurality of unmapped blocks; and

selecting the first block from the plurality of unmapped blocks if the first block has the lowest cycle count.

5. The method of claim 1, further comprising performing an erase operation to delete code in the nonvolatile memory, wherein the erase operation comprises the selecting the first block from the plurality of unmapped blocks.

6. The method of claim 5, wherein the erase operation further includes:

receiving an erase command to erase a mapped block in the nonvolatile memory at a specified physical address;

unmapping the mapped block to create a dirty unmapped block;

mapping the first block to the specified physical address; and

erasing the dirty unmapped block.

7. The method of claim 1, further comprising performing a reclaim operation to reclaim unused space in the nonvolatile memory in response to the adding or deleting of code in the nonvolatile memory, wherein the reclaim operation comprises the selecting the first block from the plurality of unmapped blocks.

8. The method of claim 7, wherein the reclaim operation further includes:

copying valid code from a dirty mapped block in the nonvolatile memory to the first block, wherein the dirty mapped block includes invalid code and valid code and wherein the dirty mapped block is mapped to a specified physical address;

unmapping the dirty mapped block to create a dirty unmapped block;

mapping the first block to the specified physical address; and

erasing the dirty unmapped block in the background.

9. The method of claim 1, further comprising adding new code to the nonvolatile memory, wherein adding new code comprises:

selecting the first block from the plurality of unmapped blocks if the first block has the lowest erase cycle count of the plurality of unmapped blocks;

writing the new code to the first block; and

mapping the first block to a physical address so that the new code is stored contiguously in the nonvolatile memory.

10. A method, comprising:

selecting a first block from a plurality of blocks in a nonvolatile memory based on a cycle count of the first block to add or delete code in the nonvolatile memory.

11. The method of claim 10, further comprising mapping the first block to a physical address so that the code is stored contiguously in one or more blocks in the nonvolatile memory.

12. The method of claim 10, wherein selecting comprises:

examining a cycle count of each of the plurality of blocks; and

selecting the first block from the plurality of blocks if the first block has the lowest cycle count.

13. An apparatus, comprising:

a control circuit to select a first block from a plurality of unmapped blocks in a nonvolatile memory based on a cycle count of the first block to add or delete code in the nonvolatile memory.

14. The apparatus of claim 13, wherein the control circuit is a coprocessor.

15. The apparatus of claim 13, wherein the control circuit is coupled to a memory array of the nonvolatile memory, the memory array includes the plurality of unmapped blocks, and the nonvolatile memory is a flash memory.

16. The apparatus of claim 15, wherein the flash memory includes a first partition that includes code and a second partition that includes data.

17. The apparatus of claim 16, wherein the control circuit includes a block mapping circuit to map the first block to a physical address so that the code is stored contiguously in one or more blocks in the nonvolatile memory.

18. The apparatus of claim 15, wherein each block of the flash memory includes a plurality of memory cells, wherein each memory cell is capable of storing at least one bit of information.

19. A system, comprising:

a control circuit to select a first block from a plurality of unmapped blocks in a nonvolatile memory based on a cycle count of the first block to add or delete code in the nonvolatile memory;

a processor coupled to the control circuit; and

an antenna coupled to the processor.

20. The system of claim 19, wherein the system is a wireless phone.

21. The apparatus of claim 19, wherein the control circuit is coupled to a memory array of the nonvolatile memory, the memory array includes the plurality of unmapped blocks, and the nonvolatile memory is a flash memory.