Semiconductor devices having a metal-insulator-metal capacitor and methods of forming the same
First Claim
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1. A semiconductor device including an MIM capacitor, comprising:
- a plate electrode disposed on a substrate;
a mold layer covering the substrate and having an opening that exposes the plate electrode;
a sidewall electrode disposed on an inner sidewall of the opening like a spacer, electrically connecting the plate electrode; and
a dielectric pattern and an upper electrode that sequentially cover the plate electrode and the sidewall electrode in the opening, wherein the plate electrode and the sidewall electrode compose a lower electrode.
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Abstract
A semiconductor device having an MIM capacitor and a method of forming the same are provided. A lower electrode includes a plate electrode and a sidewall electrode. The plate electrode is formed by a patterning process preferably including a plasma anisotropic etching. The sidewall electrode is formed like a spacer on an inner sidewall of an opening exposing the plate electrode by a plasma entire surface anisotropic etching.
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Citations
15 Claims
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1. A semiconductor device including an MIM capacitor, comprising:
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a plate electrode disposed on a substrate;
a mold layer covering the substrate and having an opening that exposes the plate electrode;
a sidewall electrode disposed on an inner sidewall of the opening like a spacer, electrically connecting the plate electrode; and
a dielectric pattern and an upper electrode that sequentially cover the plate electrode and the sidewall electrode in the opening, wherein the plate electrode and the sidewall electrode compose a lower electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of forming a semiconductor device having an MIM capacitor, comprising:
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forming a plate electrode on a substrate;
forming a mold layer covering an entire surface of the substrate and having an opening exposing the plate electrode;
forming a second conductive layer conformally on an entire surface of substrate including a surface within the opening;
forming a spacer-shaped sidewall electrode on an inner sidewall of the opening by applying a plasma entire surface anisotropic etching to the second conductive layer; and
forming sequentially a dielectric pattern and an upper electrode that cover the plate electrode and the sidewall electrode in the opening, wherein the plate electrode and the sidewall electrode compose a lower electrode. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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Specification