Semiconductor integrated circuit device

• US 20060006480A1
• Filed: 08/12/2005
• Published: 01/12/2006
• Est. Priority Date: 12/18/2000
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Shinozaki, Masao, Akioka, Takashi, Asari, Sanae, Kohara, Yutaka, Miyata, Shusaku, Nishimoto, Kenji, Nakazato, Shinji
• Granted Patent: US 7,547,971 B2
• Time in Patent Office: Days
• US Class Current: 257/401
• CPC Class Codes: H01L 2224/02 Bonding areas; Manufacturing methods related thereto
• CPC Class Codes: H01L 2224/0231 Manufacturing methods of the redistribution layers
• CPC Class Codes: H01L 2224/02311 Additive methods
• CPC Class Codes: H01L 2224/02375 Top view
• CPC Class Codes: H01L 2224/02377 Fan-in arrangement
• CPC Class Codes: H01L 2224/024 Material of the insulating layers therebetween
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05166 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05171 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05569 the external layer being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05671 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/13024 the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/13099 : Material
• CPC Class Codes: H01L 2224/131 : with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 23/5286 : Arrangements of power or ground buses
• CPC Class Codes: H01L 24/02 : Bonding areas on insulating substrates, e.g. chip carriers, H01L23/49816, H01L23/49838, H01L23/5389; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0001 : Technical content checked by a classifier
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01076 : Osmium [Os]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/013 : Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/06 : Polymers polymers per se C08; polymer adhesives C09J
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.

Claims

1. A semiconductor integrated circuit device, comprising:

a semiconductor substrate;

circuit elements and wirings which are provided on one main surface of the semiconductor substrate and constitute a circuit;

first electrodes provided on the one main surface and electrically connected to the circuit, wherein said first electrodes is disposed on a top layer of said circuit;

an organic insulating film provided on the circuit except for openings on the surfaces of the first electrodes;

a conductive layer disposed on the organic insulating film, said conductive layer is connected through said openings with said first electrode;

first and second external connecting electrodes provided on said conductive layer, wherein said conductive layer used to electrically connect the first and second external connecting electrodes to the first electrodes.

2. The semiconductor integrated circuit device according to claim 1, wherein the first and second external connecting electrodes are larger than those of the first electrodes in area.

3. The semiconductor integrated circuit device according to claim 1, wherein the first and second external connecting electrodes are bump electrodes, respectively.

4. The semiconductor integrated circuit device according to claim 1, wherein the first electrodes are bonding pads formed on the top circuit layer, respectively.

5. The semiconductor integrated circuit device according to claim 1, wherein the conductive layer is a rewiring layer.

6. The semiconductor integrated circuit device according to claim 1, wherein the semiconductor substrate is quadrangular, and the conductive layer is formed so as to be substantially identical to the length of one side of the semiconductor substrate or longer than the length thereof.

7. The semiconductor integrated circuit device according to claim 1, wherein the first and second external connecting electrodes are both supplied with the same voltage from an external circuit.

8. The semiconductor integrated circuit device according to claim 7, wherein the first and second external connecting electrodes are respectively supplied with a source voltage from an external circuit.

9. The semiconductor integrated circuit device according to claim 7, wherein the first and second external connecting electrodes are respectively supplied with a circuit ground voltage from an external circuit.

10. The semiconductor integrated circuit device according to claim 1, further including second electrodes provided on the one main surface and electrically connected to the circuit and said second electrodes are disposed on a top layer of said circuit,

wherein the first and second external connecting electrodes are connected to the conductive layer and the first and second electrodes are connected to the conductive layer.

11. The semiconductor integrated circuit device according to claim 1, wherein the first and second external connecting electrodes include solder balls.

12. The semiconductor integrated circuit device according to claim 1, wherein the conductive layers are connected with the wirings provided on the one main surface of the semiconductor substrate through a via hole formed in the organic insulating film.

13. A semiconductor integrated circuit device comprising:

a semiconductor substrate;

circuit elements and wirings which are provided on one main surface of the semiconductor substrate and constitute a circuit;

first and second electrodes provided on the one main surface and electrically connected to the circuit wherein said first and second electrodes are disposed on a top layer of said circuit;

an organic insulating film provided on the circuit except for openings on the surfaces of the first and second electrodes; and

a conductive layer disposed on the organic insulating film, said conductive layer is connected through said openings with said first and second electrodes;

first external connecting electrodes provided on said conductive layer, wherein said conductive layer used to electrically connect the first external connecting electrode to the first and second electrodes.

14. The semiconductor integrated circuit device according to claim 13, wherein the conductive layer is a rewiring.

15. The semiconductor integrated circuit device according to claim 13, further including second external connecting electrodes provided on the organic insulating film,

wherein the conductive layer is connected to the first and second external connecting electrodes and said conductive layer is connected with the first and second electrodes.

16. The semiconductor integrated circuit device according to claim 15, wherein the first and second external connecting electrodes are respectively bump electrodes.

17. The semiconductor integrated circuit device according to claim 13, wherein the first and second electrodes are respectively bonding pads disposed on a top layer of the circuit.

18. The semiconductor integrated circuit device according to claim 15, wherein the first and second external connecting electrodes are respectively set larger than the first and second electrodes in area.

19. The semiconductor integrated circuit device according to claim 18, wherein the first and second external connecting electrodes include solder balls.

20. The semiconductor integrated circuit device according to claim 13, further including third external connecting electrodes provided on a second conductive layer,

wherein the second conductive layer is connected to the third external connecting electrodes, and

wherein the second conductive layer is only connected with the third external connecting electrodes.

21. The semiconductor integrated circuit device according to claim 13, wherein the first external connecting electrodes are respectively bump electrodes.

22. The semiconductor integrated circuit device according to claim 13, wherein the first external connecting electrodes are set larger than the first and second electrodes in area.

23. The semiconductor integrated circuit device according to claim 13 wherein the first external connecting electrodes are supplied with a clock signal.

24. The semiconductor integrated circuit device according to claim 23, wherein the first external connecting electrodes include solder balls.

25. The semiconductor integrated circuit device according to claim 13, further including a voltage alternating circuit provided on the one main surface of the semiconductor substrate,

wherein the voltage alternating circuit is functioned as to alternate a first voltage to a second voltage different from the first voltage, and

wherein the conductive layer is connected to the the second voltage output.

26. The semiconductor integrated circuit device according to claim 25, further including fourth external connecting electrodes connected with a third conductive layer, wherein said third conductive layer is connected with a the first voltage input of the voltage alternating circuit.

27. The semiconductor integrated circuit device according to claim 13, further including a clock signal alternating circuit provided on the one main surface of the semiconductor substrate,

wherein the clock signal alternating circuit is functioned as to alternate a first clock to a second clock corresponding to the first clock input, and

wherein the conductive layer is connected to the second clock output.

28. The semiconductor integrated circuit device according to claim 27, further including fifth external connecting electrodes and a fourth conductive layer, wherein said fourth conductive layer is connected with a the first clock input of the clock signal alternating circuit.

29. The semiconductor integrated circuit device according to claim 27, wherein the clock signal alternating circuit is a PLL circuit.

30. The semiconductor integrated circuit device according to claim 27, wherein the clock signal alternating circuit is a DLL circuit.

31. The semiconductor integrated circuit device according to claim 27, wherein the clock signal alternating circuit is an SMD circuit.

32. The semiconductor integrated circuit device according to claim 13, wherein the wirings connected to the conductive layers include top-layer wirings formed on the one main surface lying on the semiconductor substrate, and wirings formed therebelow of the top layer wiring.

33. The semiconductor integrated circuit device according to claim 13, wherein the conductive layers are connected with wirings provided on the one main surface of the semiconductor substrate through a via hole formed in the organic insulating film.