III-nitride materials including low dislocation densities and methods associated with the same

• US 20060006500A1
• Filed: 07/07/2004
• Published: 01/12/2006
• Est. Priority Date: 07/07/2004
• Status: Active Grant

• Current Assignee: MACOM Technology Solutions Holdings, Inc.
• Original Assignee: Nitronex Corporation
• Inventors: Piner, Edwin L., Roberts, John C., Rajagopal, Pradeep
• Granted Patent: US 7,687,827 B2
• Time in Patent Office: Days
• US Class Current: 257/613
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/0251 Graded layers
• CPC Class Codes: H01L 21/02513 Microstructure
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02543 Phosphides

Abstract

Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g., electrical and optical) by increasing electron transport, limiting non-radiative recombination, and increasing compositional/growth uniformity, amongst other effects.

Claims

1. A semiconductor structure comprising:

a III-nitride material region having a screw dislocation density of less than about 10⁸/cm² throughout the III-nitride material region.

2. The structure of claim 1, wherein the III-nitride material region has a substantially constant screw dislocation density throughout the III-nitride material region.

6. The structure of claim 1, wherein each III-nitride material region of the structure has a screw dislocation density of less than about 10⁸/cm² throughout the respective regions.

7. The structure of claim 1, wherein the III-nitride material region is a gallium nitride material region.

8. The structure of claim 7, wherein the gallium nitride material region is formed on a III-nitride material region.

10. The structure of claim 1, further comprising a substrate, wherein the III-nitride material region is formed on the substrate.

11. The structure of claim 1, wherein substrate is substantially planar.

13. The structure of claim 1, wherein the III-nitride material region is vertically-grown.

14. The structure of claim 1, wherein the III-nitride material region extends continuously across an underlying region.

16. The structure of claim 1, wherein the screw dislocation density is less than about 10⁴/cm² throughout the III-nitride material region.

17. The structure of claim 1, wherein the screw dislocation density is substantially zero throughout the III-nitride material region.

18. The structure of claim 1, wherein the edge dislocation density of the III-nitride material region is greater than about 10⁸/cm².

19. The structure of claim 1, wherein the III-nitride material region has an area of greater than about 1 mm×

1 mm.

20. The structure of claim 1, further comprising a strain-absorbing layer, wherein the III-nitride material region is formed on the strain-absorbing layer.

22. The structure of claim 20, wherein the strain-absorbing layer comprises an amorphous silicon nitride-based material layer.

23. The structure of claim 22, wherein the amorphous silicon nitride-based material layer has a thickness of less than 100 Angstroms.

3-5. -5. (canceled)

9. (canceled)

12. (canceled)

15. (canceled)

21. (canceled)

24. (canceled)

25. A semiconductor structure comprising:

a III-nitride material region including an area having dimensions of at least about 100 microns×

100 microns and a screw dislocation density of less than about 10⁴/cm².

27. The structure of claim 25, further comprising a second III-nitride material region including an area having dimensions of at least about 100 microns×

100 microns and a screw dislocation density of less than about 10⁴/cm².

28. The structure of claim 25, wherein each III-nitride material region of the structure includes an area having dimensions of at least about 100 microns×

100 microns and a screw dislocation density of less than about 10⁴/cm².

33. The structure of claim 25, wherein the III-nitride material region includes an area having dimensions of at least about 1 cm×

1 cm and a screw dislocation density of less than about 10⁴/cm².

47. The structure of claim 33, wherein the area of the III-nitride material region within 100 nanometers of the semiconductor region has a screw dislocation density of substantially zero.

26. (canceled)

29-32. -32. (canceled)

34-36. -36. (canceled)

37. A semiconductor structure comprising:

a semiconductor region having a top surface; and

a III-nitride material region formed over the top surface and having a different composition than the semiconductor region, wherein a cross-sectional area of the III-nitride material region within 100 nanometers of the top surface has a screw dislocation density of less than about 10⁸/cm².

38. The structure of claim 37, wherein the semiconductor region is a substrate.

39. The structure of claim 37, wherein the semiconductor material region is a semiconductor layer.

40. The structure of claim 37, wherein the cross-sectional area has dimensions of at least about 100 micron×

100 micron.

46. The structure of claim 37, wherein the cross-sectional area of the III-nitride material region within 100 nanometers of the top surface has a screw dislocation density of less than about 10⁴/cm².

41-45. -45. (canceled)

48. A semiconductor structure comprising:

a III-nitride material region having a screw dislocation density of less than about 10⁸/cm² and an edge dislocation density of greater than about 10⁸/cm².

49. The structure of claim 48, wherein the screw dislocation density is less than about 10⁴/cm².

50. The structure of claim 48, wherein the screw dislocation density is substantially zero.

51-52. -52. (canceled)

54. A semiconductor structure comprising:

a III-nitride material region having an edge dislocation density and a screw dislocation density, the edge dislocation density being at least 100 times greater than the screw dislocation density.

55. The structure of claim 54, wherein the edge dislocation density is at least 10⁴ times greater than the screw dislocation density.

57-60. -60. (canceled)

61. A semiconductor structure comprising:

a substrate;

a silicon nitride-based material layer having a thickness of less than 100 Angstroms and substantially covering an entire top surface of the substrate; and

a III-nitride material region formed over the silicon nitride-based material layer and having a screw dislocation density of less than about 10⁸/cm².

62. A method of forming a semiconductor structure comprising:

providing a substrate; and

forming a gallium nitride material region over the substrate having a screw dislocation density of less than about 10⁸/cm² throughout the III-nitride material region.

63. The method of claim 62, wherein the step of forming the III-nitride material region comprises vertically growing the III-nitride material region.

68. The method of claim 62, wherein the screw dislocation density is substantially zero.

69. The method of claim 62, wherein the edge dislocation density of the III-nitride material region is greater than about 10⁸/cm².

71. The method of claim 62, further comprising forming a strain-absorbing layer on the substrate and forming the III-nitride material region on the strain-absorbing layer.

73. The method of claim 71, wherein the strain-absorbing layer comprises an amorphous silicon nitride-based material layer.

74. The method of claim 71, wherein the amorphous silicon nitride-based material layer has a thickness of less than 100 Angstroms.

64-67. -67. (canceled)

70. (canceled)

72. (canceled)

75. A method of forming a semiconductor structure comprising:

providing a semiconductor material region having a top surface; and

vertically growing a III-nitride material region over the semiconductor material region, the III-nitride material region having a composition different than the semiconductor material region, wherein a screw dislocation density in a cross-sectional area of the III-nitride material region located within 100 nanometers of the top surface of the semiconductor material region is less than about 10⁸/cm².

76-78. -78. (canceled)