Vertical structure semiconductor devices with improved light output

• US 20060006554A1
• Filed: 06/22/2005
• Published: 01/12/2006
• Est. Priority Date: 06/22/2004
• Status: Abandoned Application

• Current Assignee: Verticle, Inc.
• Original Assignee: Verticle, Inc.
• Inventors: Kim, Dong Woo, Yoo, Myung Cheol, Yeom, Geun Young
• Application Number:
  US11/165,110
• Publication Number:
  US 20060006554A1
• Time in Patent Office: Days
• US Class Current: 257/213
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

The invention provides a reliable technique to fabricate a new vertical structure compound semiconductor devices with highly improved light output. An exemplary embodiment of a method of fabricating light emitting semiconductor devices comprising the steps of forming a light emitting layer, and forming an undulated surface over light emitting layer to improve light output. In one embodiment, the method further comprises the step of forming a lens over the undulated surface of each of the semiconductor devices. In one embodiment, the method of claim further comprises the steps of forming a contact pad over the semiconductor structure to contact with the light emitting layer, and packaging each of the semiconductor devices in a package including an upper lead frame and lower lead frame. Advantages of the invention include an improved technique for fabricating semiconductor devices with great yield, reliability and light output.

Claims

1. A method of fabricating light emitting semiconductor devices, comprising the steps of:

forming a light emitting layer; and

forming an undulated surface over the light emitting layer to improve light output beam profile.

2. The method of claim 1, wherein the step of forming an undulated surface includes the step of forming a plurality of micro-lenses including the steps of:

forming a mask over the semiconductor structure;

removing a portion of the mask resulting in a plurality of substantially circular masks on the surface of the semiconductor structure;

shaping a mask top surface having a certain curvature by mask reflow;

etching the semiconductor structure; and

removing residual mask.

3. The method of claim 2, wherein the light emitting layer is constructed of n-GaN thicker than 2 μ

m and the micro-lenses are formed on the light emitting layer.

4. The method of claim 3, wherein prior to the forming step, surface smoothening is performed using ICPRIE to create low n-type metal contacts using 100% BCl₃ gas.

5. The method of claim 2, wherein the forming step includes the step of forming a photoresist mask over the semiconductor structure and the shaping step includes the step of photoresist mask reflow to form a substantially hemispherical shape by baking the photoresist mask at about 110 Celsius for about 1.5 minutes.

6. The method of claim 2, wherein the etching is performed to obtain highly anisotropic etching characteristics with a high concentration (>

90%) of Cl₂ gas in a mixture of Cl₂ and BCl₃ gases; and

in order to obtain a hemispherical lens shape morphology, a high bias voltage is maintained.

7. The method of claim 2, wherein the micro-lenses are approximately 4 μ

m in diameter and at approximately 8 μ

m patterns.

8. The method of claim 2, further comprising the step of forming a contact pad over the semiconductor structure in a corner location of the device.

9. The method of claim 1, further comprising the steps of:

forming a macro-lens over the undulated surface of each of the semiconductor devices.

10. The method of claim 1, further comprising the steps of:

forming a contact pad over the semiconductor structure to contact with the light emitting layer; and

packaging each of the semiconductor devices in a package including an upper lead frame and lower lead frame, wherein contact with the semiconductor device is maintained between the upper lead frame and lower lead frame.

31. A light emitting semiconductor device manufactured according to the method of claim 1.

11. A method of fabricating light emitting semiconductor devices, comprising the steps of:

forming a light emitting layer; and

forming a macro-lens over the surface of each of the semiconductor devices to improve light output beam profile.

12. The method of claim 11, wherein the step of forming a macro-lens over the surface of each of the semiconductor devices includes the steps of.

depositing a spin on glass (SoG) layer over the semiconductor devices;

and

etching the SoG layer to form the macro-lens over the surface of each of the semiconductor devices.

13. The method of claim 11, further comprising the steps of:

forming a contact pad over the semiconductor structure to contact with the light emitting layer; and

packaging each of the semiconductor devices in a package including an upper lead frame and lower lead frame, wherein contact with the semiconductor device is maintained between the upper lead frame and lower lead frame.

14. A method of fabricating light emitting semiconductor devices, comprising the steps of:

forming a light emitting layer;

forming a contact pad over the semiconductor structure to contact with the light emitting layer; and

packaging each of the semiconductor devices in a package including an upper lead frame and lower lead frame, wherein contact with the semiconductor device is maintained between the upper lead frame and lower lead frame.

15. The method of claim 14, further comprising the step of forming a contact pad over the semiconductor structure in a corner location of the device.

16. A light emitting semiconductor device, comprising:

a light emitting layer; and

an undulated surface over the light emitting layer to improve light output beam profile.

17. The light emitting semiconductor device of claim 16, wherein the undulated surface includes a plurality of micro-lenses.

18. The light emitting semiconductor device of claim 17, wherein the light emitting layer is constructed of n-GaN thicker than 2 μ

m and the micro-lenses are formed on the light emitting layer.

19. The light emitting semiconductor device of claim 18, further comprising low n-type metal contacts.

20. The light emitting semiconductor device of claim 17, wherein the micro-lenses are a substantially hemispherical shape.

21. The light emitting semiconductor device of claim 18, wherein the micro-lenses are a substantially hemispherical shape.

22. The light emitting semiconductor device of claim 17, wherein the micro-lenses are approximately 4 μ

m in diameter and at approximately 8 μ

m patterns.

23. The light emitting semiconductor device of claim 17, further comprising a contact pad over the semiconductor structure in a corner location of the device.

24. The light emitting semiconductor device of claim 16, further comprising a macro-lens over the undulated surface of the semiconductor device.

25. The light emitting semiconductor device of claim 16, further comprising:

a contact pad over the semiconductor structure to contact with the light emitting layer; and

a package including an upper lead frame and lower lead frame, wherein contact with the semiconductor device is maintained between the upper lead frame and lower lead frame.

26. A light emitting semiconductor device, comprising:

a light emitting layer; and

a macro-lens over the surface of the semiconductor device to improve light output beam profile.

27. The light emitting semiconductor device of claim 26, wherein the macro-lens comprises spin on glass (SoG).

28. The light emitting semiconductor device of claim 26, further comprising:

a contact pad over the semiconductor structure to contact with the light emitting layer; and

a package including an upper lead frame and lower lead frame, wherein contact with the semiconductor device is maintained between the upper lead frame and lower lead frame.

29. A light emitting semiconductor device, comprising:

a light emitting layer;

a contact pad over the semiconductor structure to contact with the light emitting layer; and

a package including an upper lead frame and lower lead frame, wherein contact with the semiconductor device is maintained between the upper lead frame and lower lead frame.

30. The light emitting semiconductor device of claim 29, wherein the contact pad over the semiconductor structure is positioned in a corner location of the device.