Contactless IC card system

• US 20060006955A1
• Filed: 09/14/2005
• Published: 01/12/2006
• Est. Priority Date: 06/10/1998
• Status: Active Grant

• Current Assignee: Shigeru Arisawa
• Original Assignee: Shigeru Arisawa
• Inventors: Arisawa, Shigeru
• Granted Patent: US 7,283,013 B2
• Time in Patent Office: Days
• US Class Current: 332/149
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: H03C 1/08 by means of variable impedance element H03C1/28 - H03C1/34, H03C1/46 - H03C1/52, H03C1/62 take precedence
• CPC Class Codes: H03C 1/14 the element being a diode
• CPC Class Codes: H03C 1/36 by means of semiconductor device having at least three electrodes H03C1/34, H03C1/50, H03C1/52, H03C1/62 take precedence
• CPC Class Codes: H03F 2200/327 Amplitude shift keying modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2203/7215 the gated amplifier being switched on or off by a switch at the input of the amplifier
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H03K 7/02 Amplitude modulation, i.e. PAM
• CPC Class Codes: H04L 27/04 Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/06 Demodulator circuits; Receiver circuits

Abstract

In a contactless IC card system, a modulating circuit manufactured in an IC form is operable at a high power efficiency. The demodulating apparatus is configured to include: first signal output means for outputting a first output signal having a predetermined phase with respect to that of an input signal, a second signal output means for outputting a second output signal having a predetermined phase with respect to that of the input signal, gate means for gating at least the second output signal, calculation means for adding, or subtracting the first output signal and the second output signal; and control means for controlling the operation of the gate means in response to a logic level of input data.

Claims

1. (canceled)

2. An amplifying circuit in which an operation of a field-effect transistor is switched in response to an input signal so as to output a power-amplified signal of said input signal from said field-effect transistor, comprising:

a drive circuit for switching the operation of said field-effect transistor by applying a voltage to a gate of said field-effect transistor, said voltage being higher than or equal to a source-to-drain voltage of said field-effect transistor.

3. An amplifying circuit as claimed in claim 2, wherein

an output terminal is configured to present a high impedance.

4. An amplifying circuit, comprising:

first variable resistor means, one end of which is held at a first potential and the resistance value of which is varied in response to a first control signal;

second variable resistor means, one end of which is connected to the other end of said first variable resistor means, the other end of which is held at a second potential different from said first potential and the resistance value of which is varied in response to a second control signal; and

control means for switching a signal level of said first control signal and a signal level of said second control signal so as to switch a potential at a connection center point between said first variable resistor means and said second variable resistor means to another potential corresponding to said first and second potentials, and also so as to switch an impedance of said connection center point to a high impedance in response to both an input signal and a control signal.

5. An amplifying circuit as claimed in claim 4, wherein

said first variable resistor means and said second variable resistor means are field-effect transistors.

6. An amplifying circuit as claimed in claim 5, wherein

said control means switches the signal level of said first control signal and the signal level of said second control signal to a voltage higher than or equal to a source-to-drain voltage of said field-effect transistor.

7-8. -8. (canceled)

9. A transmitter apparatus for amplitude-modulating input data to thereby transmit the amplitude-modulated input data, comprising:

a first modulating circuit for producing a first amplitude-modulated signal in response to said input data; and

a second modulating circuit for producing a second amplitude-modulated signal made of a carrier wave having a phase opposite to that of said first amplitude-modulated signal, wherein

each of said first modulating circuit and said second modulating circuit comprises;

first signal output means for outputting a first output signal having a first predetermined phase with respect to that of an input signal;

a second signal output means for outputting a second output signal having a second predetermined phase with respect to that of said input signal;

gate means for gating at least said second output signal;

calculation means for adding, or subtracting said first output signal and said second output signal; and

control means for controlling the operation of said gate means in response to a logic level of input data.

10. A modulating circuit, comprising:

a variable attenuator provided at an output terminal of a power amplifying circuit, for attenuating a power-amplified result of said power amplifying circuit in response to an input signal.

11. A modulating circuit as claimed in claim 10, wherein

the signal amplified by said power amplifying circuit is a sine wave signal having a single frequency.

12. A modulating circuit as claimed in claim 10, wherein:

the signal amplified by said power amplifying circuit is a rectangular wave signal having a single frequency.

13. A transmitter apparatus for amplitude-modulating an input signal to thereby transmit the amplitude-modulated input signal, comprising:

a first modulating circuit for producing a first amplitude-modulated signal in response to said input signal; and

a second modulating circuit for producing a second amplitude-modulated signal made of a carrier wave having a phase opposite to that of said first amplitude-modulated signal in response to said input signal, wherein

each of said first modulating circuit and said second modulating circuit comprises;

a variable attenuator provided at an output terminal of a power amplifying circuit, for attenuating a power-amplified result of said power amplifying circuit in response to an input signal.

14. A demodulating circuit comprising:

clamping means for clamping an input signal; and

band limiting means for removing a component of said input signal from an output signal of said clamping means.

15. A demodulating circuit as claimed in claim 14, wherein

said clamping means is configured as a grounded type diode.

16. A demodulating circuit as claimed in claim 14, wherein

said band limiting means comprises to any one of a low-pass filter, a band-pass filter, and a trap filter.

17. A demodulating circuit, comprising:

signal processing means for producing first and second input signals having phases different from a phase of an input signal by approximately 180 degrees;

first clamping circuit for clamping said first input signal;

second clamping circuit for clamping said second input signal;

first band limiting means for removing a component of said first input signal from an output signal of said first clamping circuit;

second band limiting means for removing a component of said second input signal from an output signal of said first clamping means; and

calculating means for adding, or averaging an output signal of said first band limiting means and an output signal of said second band limiting means.

18. A demodulating circuit as claimed in claim 17, wherein:

said first and second clamping means are configured as a grounded type diode.

19. A demodulating circuit as claimed in claim 17, wherein

said band limiting means comprises to any one of a low-pass filter, a band-pass filter, and a trap filter.

20. A demodulating circuit, comprising:

signal processing means for producing first and second input signals having phases different from a phase of an input signal by approximately 180 degrees;

a first clamping circuit for clamping said first input signal;

a second clamping circuit for clamping said second input signal;

first band limiting means for removing a component of said first input signal from an output signal of said first clamping circuit; and

second band limiting means for removing a component of said second input signal from an output signal of said second clamping circuit; and

calculating means for adding, or averaging an output signal of said first band limiting means and an output signal of said second band limiting means.

21. A demodulating circuit as claimed in claim 20, wherein

said first and second clamping means are configured as a grounded type diode.

22. A demodulating circuit as claimed in claim 20, wherein

said band limiting means comprises to any one of a low-pass filter, a band-pass filter, and a trap filter.