System and method for digital timing error correction in a communications system utilizing adaptive predistortion

• US 20060008026A1
• Filed: 07/06/2005
• Published: 01/12/2006
• Est. Priority Date: 07/09/2004
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Powerwave Technologies Incorporated
• Inventors: Johnson, Ian, Wood, Steven A., Mansell, Adrian, Luke, Christian G., Cope, Mark
• Granted Patent: US 7,239,671 B2
• Time in Patent Office: Days
• US Class Current: 375/296
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H04L 7/0029 interpolation of received data signal
• CPC Class Codes: H04L 7/0062 detection of error based on data decision error, e.g. Mueller type detection
• CPC Class Codes: H04L 7/007 detection of error based on maximum signal power, e.g. peak value, maximizing autocorrelation

Abstract

A system and method for rapidly correcting the time difference between two signals is disclosed. In particular, a system and method for very rapidly correcting timing errors to the very high degree of accuracy required for digital predistortion adaptation is disclosed. The method is a signal processing technique, which can be performed in either hardware or software, which employs a correlation computation. The correlation results are processed in a manner that enables very rapid and accurate estimation of the time difference between the two signals.

Claims

11. A method for timing error correction in an adaptive predistortion linearized communications system, comprising:

receiving an input signal comprising discrete signal samples from an input to the communications system;

receiving an output signal comprising discrete signal samples from an output of the communications system;

computing a cross-correlation function between said input and output signals;

initiating a delay-locked loop employing the results of said cross-correlation computation; and

adjusting the relative timing of said input and output signals using the output of said delay-locked loop.

1. A method for timing error correction in an adaptive predistortion linearized communications system, comprising;

receiving an input signal comprising discrete signal samples from an input to the communications system;

receiving an output signal comprising discrete signal samples from an output of the communications system;

estimating a timing delay between said input and output signals to a fraction of a sample timing; and

correcting the timing error between said input and output signals using said estimated timing delay.

2. A method for timing error correction as set out in claim 1, wherein estimating a timing delay comprises computing a cross-correlation function between said input and output samples and determining the position of the peak of the cross-correlation function.

3. A method for timing error correction as set out in claim 2, wherein the values of the cross-correlation computation are discrete and wherein determining the position of the peak of the cross-correlation function comprises approximating selected discrete values of the cross-correlation computation to a polynomial function.

4. A method for timing error correction as set out in claim 3, wherein determining the position of the peak of the cross-correlation function further comprises determining a maximum of the polynomial function.

5. A method for timing error correction as set out in claim 4, wherein determining a maximum of the polynominal function comprises computing the derivative of the polynomial function and determining the point where the derivative is zero.

6. A method for timing error correction as set out in claim 2, wherein determining the maximum of the cross-correlation function comprises determining the index value of the maximum of the cross-correlation computation, determining the N values on either side of the maximum, where N is an integer, fitting a polynomial of order N to the resulting 2N+1 discrete values of the cross-correlation computation and computing the point where the derivative of the polynomial is zero.

7. A method for timing error correction as set out in claim 6, wherein N is one and the polynomial is quadratic.

8. A method for timing error correction as set out in claim 1, wherein the timing error correction comprises acting upon one or more of the input or output signals with an interpolating function for removing the estimated delay.

9. A method for timing error correction as set out in claim 8, wherein the timing error correction comprises acting upon one or more of the input or output signals with a finite impulse response interpolating filter.

10. A method for timing error correction as set out in claim 8, wherein the interpolating function is a windowed sinc function.

12. A method for timing error correction as set out in claim 11, wherein initiating a delay-locked loop employing the results of said cross-correlation computation comprises providing an initial setting to a numerically controlled oscillator using the results of said cross-correlation computation.

13. A method for timing error correction as set out in claim 12, wherein adjusting the relative timing of said input and output signals comprises using the output of said numerically controlled oscillator to control an interpolator which receives and adjusts one or more of the input or output signals.

14. A method for timing error correction as set out in claim 13, wherein said interpolator corrects whole sample timing offsets employing indexing modification and fractional timing offsets employing a finite impulse response filter.

15. A method for timing error correction as set out in claim 12, further comprising updating the numerically controlled oscillator settings using a filtered cross-correlation computation.

16. A system for timing error correction in an adaptive predistortion linearized communications system, comprising:

a first input receiving a digital input signal from an input to the communications system;

a second input receiving a digital output signal from an output of the communications system;

a cross-correlation computation block computing a cross-correlation function between said input and output signals;

a cross-correlation peak detection block for determining the position of the peak of the cross-correlation function;

a timing delay estimator for determining an estimated timing error from said position of the peak of the cross-correlation function; and

an interpolator receiving and adjusting one or more of the digital input or output signals in response to said estimated timing error.

17. A system for timing error correction as set out in claim 15, wherein said interpolator comprises a finite impulse response filter.

18. A system for timing error correction as set out in claim 17, wherein said finite impulse response filter implements a fractional interpolation operation employing a windowed sinc function.

19. A system for timing error correction as set out in claim 15, further comprising a numerically controlled oscillator and a loop filter, coupled to said interpolator in a delay-locked loop configuration.

20. A system for timing error correction as set out in claim 19, further comprising a second cross-correlation block coupled to said cross-correlation block and loop filter, wherein the results of said cross-correlation computation are used to initialize said numerically controlled oscillator and the filtered output of said second cross-correlation block is used to update said numerically controlled oscillator.

16-1. A system for timing error correction as set out in claim 15, further comprising a summation block coupled to the cross-correlation computation block for accumulating the output of said cross-correlation computation block.