Creating a dielectric layer using ALD to deposit multiple components

• US 20060008999A1
• Filed: 09/12/2005
• Published: 01/12/2006
• Est. Priority Date: 01/21/2004
• Status: Abandoned Application

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Inventors: Mohklesi, Nima
• Application Number:
  US11/224,192
• Publication Number:
  US 20060008999A1
• Time in Patent Office: Days
• US Class Current: 438/287
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66825 with a floating gate H01L29/6684 takes precedence
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

A dielectric layer is created for use with non-volatile memory and/or other devices. The dielectric layer is created using atomic layer deposition to deposit multiple components whose mole fractions change as a function of depth in the dielectric layer in order to create a rounded bottom of a conduction band profile for the dielectric layer.

Claims

1. A method for making a dielectric layer, comprising:

using atomic layer deposition to add multiple layers of a first component to said dielectric layer; and

using atomic layer deposition to add multiple layers of a second component to said dielectric layer, said first component and said second component having varying mole fractions as a function of depth in said dielectric layer in order to create a crested bottom of a conduction band profile for said dielectric layer.

2. A method according to claim 1, further comprising:

performing an annealing process.

3. A method according to claim 1, wherein:

said steps of using atomic layer deposition to add multiple layers of a first component and using atomic layer deposition to add multiple layers of a second component include creating multiple regions of said dielectric layer; and

each of said multiple regions includes said first component and said second component with varying mole fractions for said first component and said second component as a function of depth in said dielectric layer in order to create a rounded bottom of said conduction band profile.

4. A method according to claim 3, wherein:

within each of said regions, a mole fraction for said first component is X and a mole fraction for said second component is 1-X

5. A method according to claim 4, wherein:

said first component is Al₂O₃; and

said second component is HfO₂.

6. A method according to claim 3, wherein:

said regions include a first edge region having a first conduction band bottom level, a middle region having a second conduction band bottom level and a second edge region having a third conduction band bottom level, said second conduction band bottom level is greater than said first conduction band bottom level and said third conduction band bottom level.

7. A method according to claim 6, wherein:

said regions further include first intermediate regions between said first edge region and said middle region and second intermediate regions between said second edge region and said middle region;

said first intermediate regions have conduction band bottom levels between said first conduction band bottom level and said second conduction band bottom level; and

said second intermediate regions have conduction band bottom levels between said third conduction band bottom level and said second conduction band bottom level.

8. A method according to claim 3, wherein:

each of said multiple regions includes eight layers of various combinations of layers of said first component and layers of said second component.

9. A method according to claim 8, wherein:

a first region of said multiple regions includes seven layers of said first component and one layer of said second component;

a second region of said multiple regions includes six layers of said first component and two layers of said second component;

a third region of said multiple regions includes five layers of said first component and three layers of said second component;

a fourth region of said multiple regions includes four layers of said first component and four layers of said second component;

a fifth region of said multiple regions includes five layers of said first component and three layers of said second component;

a sixth region of said multiple regions includes six layers of said first component and two layers of said second component; and

a seventh region of said multiple regions includes seven layers of said first component and one layer of said second component.

10. A method according to claim 9, wherein one layer of said first component is added by a method comprising:

introducing a precursor into a chamber;

purging said chamber;

introducing a an oxidizing agent into said chamber; and

purging said chamber.

11. A method according to claim 1, wherein:

said first component is a first dielectric; and

said second component is a second dielectric.

12. A method according to claim 1, wherein:

said steps of using atomic layer deposition to add multiple layers of a first component and using atomic layer deposition to add multiple layers of a second component create said dielectric layer so that said dielectric layer gradually transitions from said first component to said second component and back to said first component.

13. A method according to claim 12, wherein:

said second component has a mole fraction of zero at an edge of said dielectric layer.

14. A method according to claim 1, wherein:

said first component is Al₂O₃; and

said second component is HfO₂.

15. A method according to claim 1, wherein:

using atomic layer deposition to add multiple layers of a third component to said dielectric layer; and

using atomic layer deposition to add multiple layers of a fourth component to said dielectric layer, said third component and said fourth component having varying mole fractions as a function of depth in said dielectric layer.

16. A method for making a dielectric layer, comprising:

creating a first edge region using atomic layer deposition to add one or more layers of a first component and one or more layers of a second component, said first edge region has a first conduction band bottom level;

creating a center region using atomic layer deposition to add one or more layers of said first component and one or more layers of said second component, said center region has a second conduction band bottom level; and

creating a second edge region using atomic layer deposition to add one or more layers of said first component and one or more layers of said second component, said center region is between said first edge region and said second edge region, said second edge region has a third conduction band bottom level, said second conduction band bottom level is greater than said first conduction band bottom level and said third conduction band bottom level.

17. A method according to claim 16, further comprising:

performing an annealing process on said first edge region, said center region and said second edge region.

18. A method according to claim 16, wherein:

within each of said first edge region, said center region and said second edge region, a mole fraction for said first component is X and a mole fraction for said second component is 1-X.

19. A method according to claim 16, further comprising:

creating first intermediate regions, said first intermediate regions are created between locations for said first edge region and said middle region, said first intermediate regions have conduction band bottom levels between said first conduction band bottom level and said second conduction band bottom level; and

creating second intermediate regions, said first intermediate regions are created between locations for said second edge region and said middle region, said second intermediate regions have conduction band bottom level between said third conduction band bottom level and said second conduction band bottom level.

20. A method according to claim 19, wherein:

said creating said first edge region includes adding seven layers of said first component and one layer of said second component;

said creating said first intermediate regions includes creating a region with six layers of said first component and two layers of said second component and creating a region with five layers of said first component and three layers of said second component; and

said creating said middle region includes adding four layers of said first component and four layers of said second component.

21. A method according to claim 16, wherein:

said first edge region, said center region and said second edge region each include eight layers of various combinations of layers of said first component and layers of said second component.

22. A method according to claim 16, wherein:

said first component is a first dielectric; and

said second component is a second dielectric.

23. A method according to claim 16, wherein:

said first component is Al₂O₃; and

said second component is HfO₂.

24. A method for making a dielectric layer, comprising:

creating said dielectric layer using atomic layer deposition to add a first component and a second component so that said dielectric layer gradually transitions from said first component to said second component and back to said first component.

25. A method according to claim 24, further comprising:

performing an annealing process.

26. A method according to claim 25, wherein:

said creating said dielectric layer include creating multiple regions with each region including various combinations of layers of said first component and layers of said second component.

27. A method according to claim 24, wherein:

said first component is HfO₂; and

said second component is SiO₂.

28. A method according to claim 24, wherein:

said first component is Al₂O₃; and

said second component is HfO₂.

29. A method of making a non-volatile storage device, comprising:

depositing a high-K material over a region of a semiconductor to be used as a channel region;

depositing a floating gate over said high-K material;

adding a dielectric region over said floating gate, said adding of said dielectric layer includes using atomic layer deposition to add multiple layers of a first component to said dielectric layer and using atomic layer deposition to create multiple layers of a second component to said dielectric layer, said first component and said second component having varying mole fractions as a function of depth in said dielectric layer in order to create a crested bottom of a conduction band profile for said dielectric region; and

adding a control gate over said dielectric region, said non-volatile storage device is programmed by transferring charge between said floating gate and said control gate via said dielectric region.

30. A method according to claim 29, wherein:

said step of adding a dielectric region over said floating gate includes performing an annealing process.

31. A method according to claim 29, wherein:

said steps of using atomic layer deposition to add multiple layers of a first component and using atomic layer deposition to add multiple layers of a second component include creating multiple regions of said dielectric region;

each of said multiple regions includes said first component and said second component with varying mole fractions for said first component and said second component; and

said multiple regions include a first edge region having a first conduction band bottom level, a middle region having a second conduction band bottom level and a second edge region having a third conduction band bottom level, said second conduction band bottom level is greater than said first conduction band bottom level and said third conduction band bottom level.

32. A method according to claim 29, wherein:

each of said multiple regions includes eight layers of various combinations of layers of said first component and layers of said second component.

33. A method for making a dielectric layer, comprising:

using atomic layer deposition to add three or more components to form said dielectric layer, said three or more component having varying mole fractions as a function of depth in said dielectric layer in order to create a crested bottom of a conduction band profile for said dielectric layer.

34. A method according to claim 34, wherein:

said three or more components includes a first component, a second component and a third component, said first component has a mole fraction of X, said second component has a mole fraction of Y, said third component has a mole fraction of 1-X-Y.

35. A method for making a dielectric region, comprising:

using atomic layer deposition to add multiple components into said dielectric region, said multiple components are added to have mole fractions that change as a function of depth in said dielectric region.