Methods for nanowire growth

• US 20060009003A1
• Filed: 04/29/2005
• Published: 01/12/2006
• Est. Priority Date: 07/07/2004
• Status: Active Grant

• Current Assignee: ONED Material Incorporated
• Original Assignee: Nanosys Incorporated (Shoei Electronic Materials, Inc.)
• Inventors: Hamilton, James M., Romano, Linda T.
• Granted Patent: US 7,344,961 B2
• Time in Patent Office: Days
• US Class Current: 438/382
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: C30B 11/12 Vaporous components, e.g. vapour-liquid-solid-growth
• CPC Class Codes: C30B 29/605 Products containing multiple oriented crystallites, e.g. columnar crystallites
• CPC Class Codes: H01L 21/02439 Materials
• CPC Class Codes: H01L 21/02513 Microstructure
• CPC Class Codes: H01L 21/02521 Materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02603 Nanowires
• CPC Class Codes: H01L 21/02606 Nanotubes carbon nanotubes H10K85/211
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/02645 Seed materials
• CPC Class Codes: H01L 21/02653 Vapour-liquid-solid growth
• CPC Class Codes: H01L 29/0673 oriented parallel to a substrate
• CPC Class Codes: H01L 29/0676 oriented perpendicular or at an angle to a substrate
• CPC Class Codes: H01L 29/068 comprising a junction
• CPC Class Codes: H01L 29/125 Quantum wire structures
• CPC Class Codes: H01L 29/66469 with one- or zero-dimensional channel, e.g. quantum wire field-effect transistors, in-plane gate transistors [IPG], single electron transistors [SET], Coulomb blockade transistors, striped channel transistors
• CPC Class Codes: H01L 29/775 with one dimensional charge carrier gas channel, e.g. quantum wire FET
• CPC Class Codes: H01L 29/78684 having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys H01L29/7869 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 : characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10K 85/221 : Carbon nanotubes
• CPC Class Codes: Y10S 977/762 : Nanowire or quantum wire, i.e. axially elongated structure having two dimensions of 100 nm or less
• CPC Class Codes: Y10S 977/938 : Field effect transistors, FETS, with nanowire- or nanotube-channel region
• CPC Class Codes: Y10T 428/139 : Open-ended, self-supporting conduit, cylinder, or tube-type article
• CPC Class Codes: Y10T 428/2902 : Channel shape
• CPC Class Codes: Y10T 428/2949 : Glass, ceramic or metal oxide in coating

Abstract

The present invention is directed to methods to produce, process, and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides a method for producing nanowires that includes providing a thin film of a catalyst material with varying thickness on a substrate, heating the substrate and thin film, such that the thin film disassociates at the relatively thinner regions and vapor depositing a semiconductor onto the substrate to produce nanowires. A method is also provided in which two or more thin films of different materials are overlayed over a substrate, selectively etching the first underlying thin film to create a plurality of islands of the second thin film that mask portions of the first thin film and expose other portions and growing nanowires on the first thin film. Additional methods for producing nanowires are provided.

Claims

1. A method for producing nanowires, comprising:

providing a thin film of a catalyst material on a first substrate, the thin film having periodic thickness variations that include relatively thicker regions of the thin film and relatively thinner regions of the thin film;

heating the first substrate and thin film in the presence of one or more vapor phase precursors for a semiconductor to a temperature at which the thin film melts, the melting thin film disassociating at the relatively thinner regions; and

vapor depositing a semiconductor onto the first substrate, the vapor depositing being catalyzed to produce nanowires by the catalyst material.

2. A method for producing nanowires comprising:

providing a thin film of a catalyst material on a first substrate, the thin film having periodic thickness variations that include relatively thicker regions of the thin film and relatively thinner regions of the thin film; and

performing VLS nanowire growth in the presence of said film.

3. A method for producing nanowires comprising:

providing at least a first thin film of a first catalyst material on a growth substrate;

overlying the first thin film with at least one second thin film made from a second material different than the first catalyst material, the second thin film forming a plurality of islands on the first thin film;

selectively etching the first underlying thin film, whereby the plurality of islands of the second thin film mask selected portions of the first thin film and expose other regions of the first thin film that are removed by etching; and

growing a population of nanowires on the first thin film.

4. The method of claim 3, wherein the first thin film has a different thickness than the second thin film.

5. The method of claim 4, wherein the first thin film is thinner than the second thin film.

6. The method of claim 3, wherein the first thin film is less than about 10 nm in thickness.

7. The method of claim 3, wherein the first thin film is less than about 5 nm in thickness.

8. The method of claim 3, wherein the first thin film is less than about 2 nm in thickness.

9. The method of claim 3, wherein the second thin film is less than about 10 nm in thickness.

10. The method of claim 3, wherein the second thin film is less than about 5 nm in thickness.

11. The method of claim 3, further comprising removing the second thin film by etching following the step of selectively etching the first thin film.

12. The method of claim 11, further comprising coating at least a portion of the first thin film with a colloid suspension of the first catalyst material.

13. The method of claim 12, wherein the first catalyst material comprises gold (Au).

14. The method of claim 13, wherein the second catalyst material comprises chromium (Cr).

15. A method for producing nanowires comprising:

providing a thin film of a catalyst material on a first substrate, the film forming a plurality of catalyst islands on the substrate having a first island density;

partially etching one or more selected regions of the thin film where nanowire growth is desired, leaving a subset of catalyst islands in the one or more etched regions at a lower island density than said first density; and

growing a population of nanowires in the one or more etched regions from the subset of catalyst islands.

16. The method of claim 15, wherein the thin film is less than about 10 nm in thickness.

17. The method of claim 15, wherein the thin film is less than about 5 nm in thickness.

18. The method of claim 15, wherein said step of partially etching comprises etching the one or more selected regions for between about 1 and 10 seconds.

19. The method of claim 15, wherein said step of partially etching comprises etching the one or more selected regions for about 5 seconds.