Method for wafer bonding (Al, In, Ga)N and Zn(S, Se) for optoelectronic applications

• US 20060009006A1
• Filed: 07/06/2005
• Published: 01/12/2006
• Est. Priority Date: 07/06/2004
• Status: Active Grant

• Current Assignee: Japan Science & Technology Trading Co. Limited
• Original Assignee: Regents of the University of California (University of California)
• Inventors: DenBaars, Steven P., Mishra, Umesh K., Murai, Akihiko, McCarthy, Lee, Kruse, Carsten, Figge, Stephan, Hommel, Detlef
• Granted Patent: US 7,344,958 B2
• Time in Patent Office: Days
• US Class Current: 438/455
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02395 Arsenides
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02557 Sulfides
• CPC Class Codes: H01L 21/0256 Selenides
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 21/187 by direct bonding
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate

Abstract

A method for producing a wafer bonded structure between (Al, In, Ga)N and Zn(S,Se). A highly reflective and conductive distributed Bragg reflector (DBR) for relatively short optical wave lengths can be fabricated using Zn(S,Se) and MgS/(Zn, Cd)Se materials. Using wafer bonding techniques, these high-quality DBR structures can be combined with a GaN-based optical device structure.

Claims

1. A method for wafer bonding, comprising:

(a) creating a ZnSSe wafer;

(b) planarizing and cleaning the ZnSSe wafer;

(c) creating an AlGaInN wafer;

(d) cleaning the AlGaInN wafer; and

(e) joining the ZnSSe and AlGaInN wafers together and fusing the joined wafers.

2. The method of claim 1, wherein the ZnSSe wafer is created by growing Zn(S, Se) on GaAs.

3. The method of claim 2, wherein the Zn(S, Se) is grown using molecular beam epitaxy (MBE).

4. The method of claim 2, wherein the GaAs is (001) GaAs.

5. The method of claim 2, further comprising a distributed Bragg reflector (DBR) structure set in the Zn(S, Se).

6. The method of claim 1, wherein the AlGaInN wafer is created by growing (Al, In, Ga)N on sapphire.

7. The method of claim 6, wherein the (Al, In, Ga)N is grown using metal-organic chemical vapor deposition (MOCVD).

8. The method of claim 6, wherein the sapphire is c-plane (001) sapphire.

9. The method of claim 1, wherein the ZnSSe wafer is planarized using thermal annealing and chemical-mechanical polishing.

10. The method of claim 8, wherein a surface of the ZnSSe wafer has type A and B bumps that must be removed to obtain a flat surface for the fusing step.

11. The method of claim 10, wherein the type A bumps are removed from the ZnSSe wafer by a first annealing step performed on the ZnSSe wafer at 180°

C. for 1 hour in a nitrogen atmosphere.

12. The method of claim 11, wherein the type B bumps are removed from the ZnSSe wafer by polishing the ZnSSe wafer after the first annealing step is performed using a colloidal silica suspension and polishing cloth.

13. The method of claim 12, wherein newly generated type A bumps appear on the ZnSSe wafer after polishing, and the newly generated type A bumps are removed from the ZnSSe wafer using a second annealing step performed on the ZnSSe wafer at 180°

C. for 1 hour in a nitrogen atmosphere, resulting in a surface suitable for bonding.

14. The method of claim 1, wherein the AlGaInN wafer is oxidized in an oxygen plasma followed by oxide removal in HCl.

15. The method of claim 1, wherein the ZnSSe wafer and AlGaInN wafer are joined together under uniaxial pressure of 2 MPa using a graphite boat and screw configuration.

16. The method of claim 1, wherein the joined wafers are wafer bonded in a nitrogen ambient under uniaxial pressure at a set temperature for a set duration.

17. The method of claim 16, wherein the joined wafers are loaded into a wafer bonding furnace, and the furnace is heated to a temperature of 270°

C. for 1 hour in a N₂ flow.

18. A device fabricated by the method of any of the preceding claims.