Method and apparatus for calibrating and/or deskewing communications channels

• US 20060010358A1
• Filed: 09/13/2004
• Published: 01/12/2006
• Est. Priority Date: 07/09/2004
• Status: Active Grant

• Current Assignee: FormFactor Incorporated
• Original Assignee: FormFactor Incorporated
• Inventors: Miller, Charles A.
• Granted Patent: US 7,595,629 B2
• Time in Patent Office: Days
• US Class Current: 714/700
• CPC Class Codes: G01R 31/3016 Delay or race condition test, e.g. race hazard test
• CPC Class Codes: G01R 31/31723 Hardware for routing the test signal within the device under test to the circuits to be tested, e.g. multiplexer for multiple core testing, accessing internal nodes routing the test signal to or from the device under test G01R31/31926
• CPC Class Codes: G01R 31/318511 Wafer Test
• CPC Class Codes: G01R 31/3191 Calibration
• CPC Class Codes: G01R 31/31937 Timing aspects, e.g. measuring propagation delay G01R31/3191 and G01R31/31922 take precedence; marginal testing G06F11/24
• CPC Class Codes: G01R 35/005 Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references G01R33/0035, G01R35/002 take precedence

Abstract

A series of pulses may be driven down each drive channel, which creates a series of composite pulses at the output of the buffer. Each composite pulse is a composition of the individual pulses driven down the drive channels. Timing offsets associated with the drive channels may be adjusted until the individual pulses of the composite pulse align or closely align. Those timing offsets calibrate and/or deskew the drive channels, compensating for differences in the propagation delays through the drive channels. The composite pulse may be feed back to the tester through compare channels, and offsets associated with compare signals for each compare channel may be aligned to the composite pulse, which calibrates and/or deskews the compare channels.

Claims

1. A method of determining a timing delay to be associated with a communications channel of a machine, said method comprising:

electrically connecting together a plurality of first drive channels of said machine;

driving first signals onto said first drive channels;

monitoring a first composite signal comprising a combination of said first signals; and

adjusting a timing delay associated with one of said first drive channels until said first composite signal exhibits a characteristic indicating improved alignment of said first signals within said first composite signal.

2. The method of claim 1, wherein said adjusting step further comprises adjusting timing delays associated with each of said first driver channels until said first composite signal exhibits a characteristic indicating improved alignment of said first signals that compose said first composite signal.

3. The method of claim 2 further comprising repeating said driving step, said monitoring step, and said adjusting step a plurality of times.

4. The method of claim 2, wherein said characteristic of said first composite signal corresponds to peak power of said first composite signal.

5. The method of claim 2, wherein said characteristic of said first composite signal corresponds to one of a peak mean-square voltage or a peak root-mean-square voltage measurement of said first composite signal.

6. The method of claim 1, wherein each said first signal comprises a pulse.

7. The method of claim 6, wherein each said first signal comprises a series of pulses.

8. The method of claim 1 further comprising:

electrically connecting together a plurality of second drive channels;

driving second signals onto said second drive channels;

monitoring a second composite signal comprising a combination of said second signals; and

adjusting a timing delay associated with one of said second drive channels until said second composite signal exhibits a characteristic indicating improved alignment of said second signals within said second composite signal.

9. The method of claim 8, wherein:

said first drive channels are configured to provide test data to a first electronic device to be tested, and

said second drive channels are configured to provide test data to a second electronic device to be tested.

10. The method of claim 9 further comprising:

electrically connecting said first composite signal to a plurality of first compare channels of said machine;

adjusting a timing delay associated with one of said first compare channels to align a compare signal of a comparator associated with said one of said first compare channels with said first composite signal.

11. The method of claim 10 further comprising adjusting timing delays associated with each of said first compare channels to align a compare signal of a comparator associated with each of said first compare channels with said first composite signal.

12. The method of claim 10 further comprising:

electrically connecting said second composite signal to a plurality of second compare channels of said machine; and

adjusting a timing delay associated with one of said second compare channels to align a compare signal of a comparator associated with said one of said second compare channels with said second composite signal.

13. The method of claim 12 further comprising adjusting a timing delay associated with each of said second compare channels to align a compare signal of a comparator associated with each of said second compare channels with said second composite signal.

14. The method of claim 12, wherein:

said first compare channels are configured to receive response data generated by said first electronic device in response to said test data provided to said first electronic device through said first drive channels, and

said second compare channels are configured to receive response data generated by said second electronic device in response to said test data provided to said second electronic device through said second drive channels.

15. The method of claim 8, wherein each said second signal comprises a pulse.

16. The method of claim 15, wherein said second signal comprises a series of pulses.

17. The method of claim 1 further comprising:

electrically connecting said first composite signal to a plurality of first compare channels of said machine;

adjusting a timing delay associated with one of said first compare channels to align a compare signal of a comparator associated with said one of said first compare channels with said first composite signal.

18. The method of claim 17 further comprising adjusting timing delays associated with each of said first compare channels to align a compare signal of a comparator associated with each of said first compare channels with said first composite signal.

19. The method of claim 1, wherein said machine is a tester for testing electronic devices.

20. The method of claim 19, wherein said electronic devices are semiconductor devices.

21. A calibration substrate comprising:

a plurality of first input terminals disposed to receive input from a plurality of first drive channels of a machine;

a first buffer, wherein said first input terminals are electrically connected to an input of said first buffer;

a first detector configured to receive as input an output of said first buffer; and

a first output terminal electrically connected to an output of said first detector and configured to connect electrically with a channel of said machine.

22. The calibration substrate of claim 21 further comprising a plurality of additional first output terminals each electrically connected to said input of said first buffer and configured to connect electrically with a plurality of first compare channels of said machine.

23. The calibration substrate of claim 22 further comprising:

a plurality of second input terminals disposed to receive input from a plurality of second drive channels of said machine;

a second buffer, wherein said second input terminals are electrically connected to an input of said second buffer;

a second detector configured to receive as input an output of said second buffer; and

a second output terminal electrically connected to an input of said second detector and configure to connect electrically to a channel of said machine.

24. The calibration substrate of claim 23 further comprising a plurality of additional second output terminals each electrically connected to said output of said second buffer and configured to connect electrically to a plurality of second compare channels of said machine.

25. The calibration substrate of claim 24, wherein:

said first drive channels are configured to provide test data to a first electronic device to be tested, and

said second drive channels are configured to provide test data to a second electronic device to be tested.

26. The calibration substrate of claim 25, wherein:

said first compare channels are configured to receive response data generated by said first electronic device in response to said test data provided to said first electronic device through said first drive channels, and

said second additional compare channels are configured to receive response data generated by said second electronic device in response to said test data provided to said second electronic device through said second drive channels.

27. The calibration substrate of claim 21, wherein electrical paths connecting said first input terminals to said input of said first buffer are of equal length.

28. The calibration substrate of claim 21 further comprising a plurality of resistors disposed between said first input terminals and said input of said first buffer.

29. The calibration substrate of claim 28, wherein said resistors are sized and disposed to match an impedance of said drive channels.

30. The calibration substrate of claim 21 further comprising an electronic filter disposed to filter said output of said first buffer.

31. The calibration substrate of claim 21, wherein said machine is a tester.

32. A machine readable media comprising instructions for causing said machine to perform a method of setting timing delays for channels of a tester, said method comprising:

driving first signals onto a plurality of first drive channels;

receiving first data corresponding to a first composite signal comprising a combination of said first signals; and

adjusting a timing delay associated with one of said first drive channels until said first data indicates improved alignment of said first signals within said first composite signal.

33. The machine readable media of claim 32, wherein said adjusting step further comprises adjusting timing delays associated with each of said first driver channels until said first data indicates improved alignment of said first signals within said first composite signal.

34. The machine readable media of claim 32 further comprising repeating said driving step, said receiving step, and said adjusting step a plurality of times.

35. The machine readable media of claim 32, wherein said first data corresponds to power of said first composite signal.

36. The machine readable media of claim 32, wherein said first data corresponds to a root-mean-square voltage measurement of said first composite signal.

37. The machine readable media of claim 32, wherein each said first signal comprises a pulse.

38. The machine readable media of claim 32, wherein each said first signal comprises a series of pulses.

39. The machine readable media of claim 32, wherein said method further comprises:

driving second signals onto a plurality of second drive channels;

receiving second data corresponding to a second composite signal comprising a combination of said second signals; and

adjusting a timing delay associated with one of said second drive channels until said second data indicates improved alignment of said second signals within said second composite signal.

40. The machine readable media of claim 39, wherein:

said first drive channels are configured to provide test data to a first electronic device to be tested, and

said second drive channels are configured to provide test data to a second electronic device to be tested.

41. The machine readable media of claim 39, wherein said method further comprises:

adjusting timing delays associated with compare signals of a plurality of first compare channels to align said compare signals with said first composite signal at comparators in said first compare channels.

42. The machine readable media of claim 39, wherein each said second signal comprise a pulse.

43. The machine readable media of claim 42, wherein each said second signal comprises a series of pulses.

44. A probe card comprising:

a plurality of probes disposed to contact terminals of an electronic device to be tested;

means for electrically connecting ones of said probes to a source of test signals; and

circuitry configured to process a composite signal comprising a combination of calibration signals received at said probe card from said source of test signals and driven through ones of said probes into input terminals of a calibration substrate, said composite signal received at said probe card through a calibration probe disposed to contact an output terminal of said calibration substrate.

45. The probe card of claim 44, wherein said calibration probe comprises one of said plurality of probes disposed to contact terminals of an electronic device to be tested.

46. The probe card of claim 44, wherein said calibration probe comprises a spare probe that does not correspond to a contact terminal of said electronic device to be tested.

47. The probe card of claim 44, wherein said circuitry comprises a detector configured to detect a power level of said composite signal.

48. The probe card of claim 47, wherein said circuitry comprises a buffer configured to receive said composite signal and output said composite signal to said detector.

49. The probe card of claim 48, wherein said circuitry comprises a filter disposed between said buffer and said detector and configured to filter said composite signal output from said buffer and output said filtered composite signal to said detector.

50. The probe card of claim 44, wherein said circuitry comprises a detector configured to detect an edge of said composite signal.

51. The probe card of claim 50, wherein said circuitry comprises a buffer configured to receive said composite signal and output said composite signal to said detector.

52. The probe card of claim 51, wherein said circuitry comprises a filter disposed between said buffer and said detector and configured to filter said composite signal output from said buffer and output said filtered composite signal to said detector.

53. The probe card of claim 44, wherein said circuitry comprises a buffer configured to buffer said composite signal.

54. The probe card of claim 44, wherein said circuitry comprises a filter configured to filter said composite signal.

55. The probe card of claim 54, wherein said filter passes only selected harmonic content of said composite signal.

56. The probe card of claim 54, wherein said filter removes selected harmonic contact of said composite signal.

57. The probe card of claim 44 further comprising a data storage device configured to store data representing deskewing offsets for said probe card.

58. The probe card of claim 44 further comprising a data storage device in which are stored data representing deskewing offsets for said probe card.

59. The probe card of claim 44, wherein:

said means for electrically connecting comprises a plurality of substrates, and

said circuitry is disposed on one of said substrates.

60. A probe card comprising:

a plurality of probes disposed to contact terminals of an electronic device to be tested;

means for electrically connecting ones of said probes to a source of test signals;

a data storage device configured to store data representing deskewing offsets for said probe card.

61. The probe card of claim 60, wherein data representing deskewing offsets for said probe card are stored in said data storage device.