Method of manufacturing a semiconductor device

• US 20060014335A1
• Filed: 09/13/2005
• Published: 01/19/2006
• Est. Priority Date: 08/11/2000
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ohnuma, Hideto, Uehara, Ichiro
• Granted Patent: US 7,169,656 B2
• Time in Patent Office: Days
• US Class Current: 438/155
• CPC Class Codes: H01L 2029/7863 with an LDD consisting of more than one lightly doped zone or having a non-homogeneous dopant distribution, e.g. graded LDD
• CPC Class Codes: H01L 21/28114 characterised by the sectional shape, e.g. T, inverted-T
• CPC Class Codes: H01L 21/32136 using plasmas
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66598 forming drain [D] and lightly doped drain [LDD] simultaneously, e.g. using implantation through the wings a T-shaped layer, or through a specially shaped layer
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78627 with a significant overlap between the lightly doped drain and the gate electrode, e.g. GOLDD
• CPC Class Codes: Y10S 438/949 Energy beam treating radiation resist on semiconductor

Abstract

Formation of LDD structures and GOLD structures in a semiconductor device is conventionally performed in a self aligning manner with gate electrodes as masks, but there are many cases in which the gate electrodes have two layer structures, and film formation processes and etching processes become complex. Further, in order to perform formation of LDD structures and GOLD structures only by processes such as dry etching, the transistor structures all have the same structure, and it is difficult to form LDD structures, GOLD structures, and single drain structures separately for different circuits. By applying a photolithography process for forming gate electrodes to photomasks or reticles, in which supplemental patterns having a function of reducing the intensity of light and composed of diffraction grating patterns or translucent films, are established, GOLD structure, LDD structure, and single drain structure transistors can be easily manufactured for different circuits through dry etching and ion injection process steps.

Claims

1-64. -64. (canceled)

65. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region and a second semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a second gate electrode over the second semiconductor region by using the photoresist pattern;

forming at least a first source region, a first drain region, a lightly doped region, and a first channel region in the first semiconductor region, said lightly doped region having a smaller impurity concentration than said first source region and said first drain region, and being located between the first channel region and at least one of the first source region and the first drain region; and

forming at least a second source region, a second drain region and a second channel region in the second semiconductor region, the second channel region being contiguous with the second source region and the second drain region,

wherein said mask comprises at least a first pattern for the first gate electrode and a second pattern for the second gate electrode, with the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light.

66. The method of manufacturing a semiconductor device according to claim 65 wherein the second pattern does not have a portion which only partly blocks light.

67. The method of manufacturing a semiconductor device according to claim 65 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

68. The method of manufacturing a semiconductor device according to claim 65 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

69. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region and a second semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a second gate electrode over the second semiconductor region by using the photoresist pattern; and

forming at least a first transistor having said first gate electrode and a second transistor having said second gate electrode wherein the first transistor has an LDD structure while the second transistor does not have an LDD structure;

wherein said mask comprises at least a first pattern for the first gate electrode and a second pattern for the second gate electrode, the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light.

70. The method of manufacturing a semiconductor device according to claim 69 wherein the second pattern does not have such a portion which only partly blocks light.

71. The method of manufacturing a semiconductor device according to claim 69 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

72. The method of manufacturing a semiconductor device according to claim 69 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

73. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a wiring by using the photoresist pattern wherein said first gate electrode has a side edge with a stepped configuration and said wiring has a side edge without such a stepped configuration; and

forming at least a first source region, a first drain region, a lightly doped region, and a first channel region in the first semiconductor region, said lightly doped region having a smaller impurity concentration than said first source region and said first drain region wherein the lightly doped region is located between the first channel region and at least one of the first source and first drain regions;

wherein said mask comprises at least a first pattern for the first gate electrode and a second pattern for the wiring, the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light.

74. The method of manufacturing a semiconductor device according to claim 73 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

75. The method of manufacturing a semiconductor device according to claim 73 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

76. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region;

forming a photoresist pattern over a conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over a first semiconductor layer and a wiring by using the photoresist pattern; and

forming at least a first source region, a first drain region, a lightly doped region, and a first channel region in the first semiconductor region, said lightly doped region having a smaller impurity concentration than said first source region and said first drain region wherein the lightly doped region is located between the first channel region and at least one of the first source region and the first drain region;

wherein said mask comprises at least first and second patterns for the first gate electrode and the wiring, respectively, with the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light, the second pattern not having a portion which only partly blocks light.

77. The method of manufacturing a semiconductor device according to claim 76 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

78. The method of manufacturing a semiconductor device according to claim 76 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

79. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over a first semiconductor region and a wiring by using the photoresist pattern wherein said first gate electrode has a side edge with a stepped configuration and said wiring has a side edge without such a stepped configuration; and

forming at least a first transistor having said first gate electrode wherein the first transistor has an LDD structure;

wherein said mask comprises at least a first pattern for the first gate electrode and a second pattern for the wiring, with the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light.

80. The method of manufacturing a semiconductor device according to claim 79 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

81. The method of manufacturing a semiconductor device according to claim 79 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

82. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over a first semiconductor region and a wiring by using the photoresist pattern; and

forming at least a first transistor having said first gate electrode wherein the first transistor has an LDD structure;

wherein said mask comprises at least first and second patterns for the first gate electrode and the wiring, respectively, the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light while the second pattern does not have such a portion which partly blocks light.

83. The method of manufacturing a semiconductor device according to claim 82 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

84. The method of manufacturing a semiconductor device according to claim 82 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

85. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region and a second semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a capacitor electrode over the second semiconductor region by using the photoresist pattern wherein said first gate electrode has a side edge with a stepped configuration and said capacitor electrode has a side edge without such a stepped configuration; and

forming at least a first source region, a first drain region, a lightly doped region, and a first channel region in the first semiconductor layer, said lightly doped region having a smaller impurity concentration than said first source and first drain regions wherein the lightly doped region is located between the first channel region and at least one of the first source and first drain regions;

wherein said mask comprises at least a first pattern for the first gate electrode and a second pattern for the capacitor electrode, the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light.

86. The method of manufacturing a semiconductor device according to claim 85 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

87. The method of manufacturing a semiconductor device according to claim 85 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

88. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region;

forming a photoresist pattern over a conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a capacitor electrode over the second semiconductor region by using the photoresist pattern; and

forming at least a first source region, a first drain region, a lightly doped region, and a first channel region in the first semiconductor layer, said lightly doped region having a smaller impurity concentration than said first source and first drain regions wherein the lightly doped region is located between the first channel region and at least one of the first source and first drain regions;

wherein said mask comprises at least first and second patterns for the first gate electrode and the capacitor electrode, respectively, the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light while the second pattern does not have such a portion which partly blocks light.

89. The method of manufacturing a semiconductor device according to claim 88 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

90. The method of manufacturing a semiconductor device according to claim 88 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

91. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region and a second semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a capacitor electrode over the second semiconductor region by using the photoresist pattern wherein said first gate electrode has a side edge with a stepped configuration and said capacitor electrode has a side edge without such a stepped configuration; and

forming at least a first transistor having said first gate electrode wherein the first transistor has an LDD structure;

wherein said mask comprises at least a first pattern for the first gate electrode and a second pattern for the capacitor electrode, the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light.

92. The method of manufacturing a semiconductor device according to claim 91 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

93. The method of manufacturing a semiconductor device according to claim 91 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

94. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region and a second semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a capacitor electrode over the second semiconductor region by using the photoresist pattern; and

forming at least a first transistor having said first gate electrode wherein the first transistor has an LDD structure;

wherein said mask comprises at least first and second patterns for the first gate electrode and the capacitor electrode, respectively, with the first pattern including a first portion which substantially blocks light and a second portion which partly blocks light, and the second pattern not having a portion which only partly blocks light.

95. The method of manufacturing a semiconductor device according to claim 94 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

96. The method of manufacturing a semiconductor device according to claim 94 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

97. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region and a second semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor region and a capacitor electrode over the second semiconductor region by using the photoresist pattern; and

forming at least a first source region, a first drain region, a lightly doped region, and a first channel region in the first semiconductor layer, said lightly doped region having a smaller impurity concentration than said first source and first drain regions wherein the lightly doped region is located between the first channel region and at least one of the first source and first drain regions;

wherein said mask comprises at least first and second patterns for the first gate electrode and the capacitor electrode, respectively, each of the first and second patterns including a first portion which substantially blocks light and a second portion which partly blocks light.

98. The method of manufacturing a semiconductor device according to claim 97 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

99. The method of manufacturing a semiconductor device according to claim 97 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

100. The method of manufacturing a semiconductor device according to claim 97 each of said first gate electrode and said capacitor electrode has a side edge with a stepped configuration

101. A method of manufacturing a semiconductor device comprising:

forming a conductive layer over a first semiconductor region and a second semiconductor region;

forming a photoresist pattern over the conductive layer by performing a light exposure using a mask;

patterning the conductive layer to form at least a first gate electrode over the first semiconductor reigon and a capacitor electrode over the second semiconductor region by using the photoresist pattern; and

forming at least a first transistor having said first gate electrode wherein the first transistor has an LDD structure;

wherein said mask comprises at least first and second patterns for the first gate electrode and the capacitor electrode, respectively, each of the first and second patterns including a first portion which substantially blocks light and a second portion which partly blocks light.

102. The method of manufacturing a semiconductor device according to claim 101 wherein the first semiconductor region includes a first semiconductor film and the second semiconductor region includes a second semiconductor film, both formed on an insulating surface.

103. The method of manufacturing a semiconductor device according to claim 101 wherein the first semiconductor region and the second semiconductor region are formed in a semiconductor substrate.

104. The method of manufacturing a semiconductor device according to claim 101 wherein each of said first gate electrode and said capacitor electrode has a side edge with a stepped configuration.