Method of detecting one or more defects in a string of spaced apart studs

• US 20060014339A1
• Filed: 09/06/2005
• Published: 01/19/2006
• Est. Priority Date: 10/23/2003
• Status: Abandoned Application

• Current Assignee: Dana Lee, Felix Ying-Kit Tsui, Wen-Juei Lu
• Original Assignee: Dana Lee, Felix Ying-Kit Tsui, Wen-Juei Lu
• Inventors: Lee, Dana, Lu, Wen-Juei, Tsui, Felix Ying-Kit
• Application Number:
  US11/221,161
• Publication Number:
  US 20060014339A1
• Time in Patent Office: Days
• US Class Current: 438/201
• CPC Class Codes: H01L 21/76895 Local interconnects; Local pads, as exemplified by patent document EP0896365

Abstract

A landing pad for use as a contact to a conductive spacer adjacent a structure in a semiconductor device comprises two islands, each of which is substantially rectangularly shaped and is spaced apart from one another and from the structure. Conductive spacers are adjacent to each island and overlapping each other and overlapping with the conductive spacer adjacent to the structure. The contact to the landing pad is on the conductive spacers adjacent to the islands and spaced apart from the structure.

Claims

1-4. -4. (canceled)

5. A method of forming a landing pad to a conductive spacer adjacent a structure, said method comprising:

forming the structure on a semiconductor substrate, said structure having a substantially planar side;

forming two islands on the semiconductor substrate, each island substantially rectangularly shaped and spaced apart from one another and from the planar side of the structure;

forming conductive spacers adjacent to the planar side of the structure between the structure and the islands, and adjacent to each of the islands, surrounding each island, with said conductive spacers overlapping one another between the islands and between the islands and the structure; and

forming a landing pad, said landing pad being on said conductive spacers, between the islands and between the islands and the structure.

6. The method of claim 5 wherein said conductive spacers are made of conductive polysilicon.

7. The method of claim 6 wherein said forming conductive spacers step further comprises:

conformally depositing a layer of polysilicon on said islands and on said structure and therebetween;

anisotropically etching said layer of polysilicon to form said conductive spacers.

8. The method of claim 7 wherein said forming a landing step further comprises:

masking said islands, structure and conductive spacers with a layer of insulating material;

selectively removing a portion of said layer of insulating material at a position between the islands and between the islands and the structure to form the landing pad.

9. The method of claim 8 wherein the islands are spaced apart form one another by a distance which is less than twice the width of each conductive spacer.

10. The method of claim 9 wherein the islands are spaced apart from the structure by a distance which is less than twice the width of each conductive spacer.

11-16. -16. (canceled)

17. A method of detecting one or more defects in a string of spaced apart studs on a semiconductor substrate wherein each stud is separated by a distance of 2X from an adjacent stud, said method comprising:

forming a plurality of conductive spacers with each spacer formed adjacent each stud, and overlapping with an adjacent spacer, each spacer having a width of at least X; and

electrically testing the continuity of the plurality of conductive spacers;

wherein in the event of failure of the testing step, said failure is indicative of the existence of one or more defects.

18. The method of claim 17 wherein said step of forming a plurality of conductive spacers comprises:

depositing conformally a layer of conductive polysilicon over said string of studs;

anisotropically etching said layer of conductive polysilicon to form said plurality of conductive spacers.

19. A method of detecting one or more defects in a string of spaced apart holes in a semiconductor device wherein each hole is separated by a distance of 2X from an adjacent hole, said method comprising:

converting each hole into a stud;

forming a plurality of conductive spacers with each spacer formed adjacent each stud, and overlapping with an adjacent spacer, each spacer having a width of at least X; and

electrically testing the continuity of the plurality of conductive spacers;

wherein in the event of failure of the testing step, said failure is indicative of the existence of one or more defects.

20. The method of claim 19 wherein said step of forming a plurality of conductive spacers comprises:

depositing conformally a layer of conductive polysilicon over said string of studs;

anisotropically etching said layer of conductive polysilicon to form said plurality of conductive spacers.

21. The method of claim 19 wherein said converting step comprises a damascene process.