Semiconductor device and power supply unit utilizing the same

• US 20060017067A1
• Filed: 06/30/2005
• Published: 01/26/2006
• Est. Priority Date: 07/21/2004
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Kitagawa, Atsushi
• Granted Patent: US 8,063,494 B2
• Time in Patent Office: Days
• US Class Current: 257/207
• CPC Class Codes: H01L 2224/13014 being circular or elliptic
• CPC Class Codes: H01L 2224/14131 being uniform, i.e. having a uniform pitch across the array
• CPC Class Codes: H01L 24/14 of a plurality of bump connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H02M 3/155 using semiconductor devices only
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

A semiconductor device has pluralities of grid array terminals forming a grid array structure, e.g. a BGA structure, in which the output end of a built-in switch circuit is connected to multiple terminals of the grid array structure, thereby reducing the current that flows through each of the multiple terminals below a permissible level and minimizing the heat due to contact resistances of the multiple terminals in contact with the IC socket of the semiconductor device. Each pair of nearest neighbors of the multiple terminals is interposed by at least one further array terminal. The multiple terminals are all located at the outermost peripheral terminal positions of the grid array structure. Thus, the heat generated in the respective multiple terminals connected to the switch circuit is reduced, thereby minimizing the possibility of hazardous melting of the terminals.

Claims

1. A semiconductor device including a switch circuit and a drive circuit for performing ON-OFF control of said switch circuit, and having grid array terminals forming a grid array structure, wherein the output end of said switch circuit is connected to multiple terminals of said grid array structure.

2. The semiconductor device according to claim 1, wherein each pair of nearest neighbors of said multiple terminals is provided therebetween with at least one interposing terminal other than said multiple terminals.

3. The semiconductor device according to claim 2, wherein no or only a small amount of current flows through said at least one interposing terminal, as compared with the current that flows through said switch circuit.

4. The semiconductor device according to claim 1, wherein said multiple terminals are all located at the outermost peripheral terminal positions of said grid array structure.

5. The semiconductor device according to claim 4, wherein each pair of nearest neighbors of said multiple terminals is provided therebetween with at least one interposing terminal other than said multiple terminals.

6. The semiconductor device according to claim 5, wherein no or only a small amount of current flows through said at least one interposing terminal, as compared with the current that flows through said switch circuit.

7. The semiconductor device according to claim 1, wherein said switch circuit consists of a multiplicity of transistor switches connected in parallel with one another so as to be simultaneously turned on and off.

8. The semiconductor device according to claim 1, wherein each of said grid array terminals is a ball-shaped terminal.

9. The semiconductor device according to claim 8, wherein said multiple terminals are all located at the outermost peripheral terminal positions of said grid array structure.

10. The semiconductor device according to claim 9, wherein each pair of nearest neighbors of said multiple terminals is provided therebetween with at least one interposing terminal other than said multiple terminals.

11. A power supply unit equipped with a semiconductor device that includes a switch circuit and a drive circuit for performing ON-OFF control of said switch circuit and has grid array terminals forming a grid array structure, wherein

the output end of said switch circuit is connected to multiple terminals of said grid array structure;

said multiple terminals are connected with one another outside said semiconductor device; and

said power supply unit is adapted to convert its input voltage into an output voltage under said ON-OFF