Semiconductor device with high-k gate dielectric and quasi-metal gate, and method of forming thereof

• US 20060017112A1
• Filed: 07/20/2005
• Published: 01/26/2006
• Est. Priority Date: 07/21/2004
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hu, Chenming, Wang, Chih-Hao, Tsai, Ching-Wei
• Granted Patent: US 7,279,756 B2
• Time in Patent Office: Days
• US Class Current: 257/369
• CPC Class Codes: H01L 21/28123 Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A process and apparatus for a semiconductor device is provided. A device comprises a first transistor having a first charge carrier type. The first transistor comprises a high-k gate dielectric and a first doped electrode. The first charge carrier type comprises one of p-type and n-type and the first doped electrode comprises the other of p-type and n-type. The device further comprises a second transistor having a charge carrier type opposite the first charge carrier type. The second transistor comprises the high-k gate dielectric, and a second doped electrode, wherein the second doped electrode comprises the other of p-type and n-type.

Claims

1. A semiconductor device comprising:

a first transistor having a first conductive channel, wherein the first transistor comprises a high-k gate dielectric and a first doped electrode, wherein the first conductive channel comprises one of p-type and n-type and the first doped electrode comprises the other of p-type and n-type; and

a second transistor having a second conductive channel opposite the first conductive channel, wherein the second transistor comprises the high-k gate dielectric, and a second doped electrode, wherein the second doped electrode comprises the other of p-type and n-type.

2. The semiconductor device according to claim 1, wherein the high-k gate dielectric comprises a material having a gate dielectric constant greater than 3.9.

3. The semiconductor device of claim 1, wherein the high-k gate dielectric comprises aluminum oxide.

4. The semiconductor device of claim 1, wherein the high-k gate dielectric comprises hafnium oxide.

5. The semiconductor device of claim 1, wherein an effective oxide thickness for the high-k gate dielectric is less than about 2 nm.

6. The semiconductor device of claim 1, wherein the first transistor comprises an n-channel transistor, the second transistor comprises a p-channel transistor, and the first and second doped electrodes comprise p-type.

7. The semiconductor device of claim 1, wherein the first transistor comprises a p-channel transistor, the second transistor comprises an n-channel transistor, and the first and second doped electrodes comprise n-type.

8. The semiconductor device of claim 1, wherein the high-k gate dielectric comprises a material selected from the group consisting essentially of silicon, silicon nitride, tantalum, lanthanum, hafnium, aluminum, oxides, and combinations thereof.

9. The semiconductor device of claim 1, wherein the first and second doped electrodes comprise a material selected from the group consisting essentially of silicon, germanium, polysilicon, amorphous silicon, and combinations thereof.

10. The semiconductor device of claim 1, wherein at least one of the first transistor and the second transistor further comprise a counter doping channel formed under the high-k gate dielectric.

11. The semiconductor device according to claim 10, wherein the counter doping channel comprises a material selected from the group consisting essentially of silicon, germanium, carbon, strained silicon, strained carbon, strained germanium, strained silicon germanium, and combinations thereof.

12. A semiconductor device comprising:

at least one n-channel device having a high-k gate dielectric and at least one p-channel device having a high-k gate dielectric, wherein the n-channel device and the p-channel device have the same doping type of gate, and wherein a gate doping concentration is different for the n-channel device and for the p-channel device.

13. The semiconductor device according to claim 12, wherein the high-k gate dielectric comprises a material having a gate dielectric constant greater than 3.9.

14. The semiconductor device of claim 12, wherein the high-k gate dielectric comprises aluminum oxide.

15. The semiconductor device of claim 12, wherein the high-k gate dielectric comprises hafnium oxide.

16. The semiconductor device of claim 12, wherein at least one of the n-channel device and the p-channel device further comprise a counter doping channel formed under the high-k gate dielectric.

17. The semiconductor device of claim 12, wherein an effective oxide thickness for the high-k gate dielectric is less than about 2 nm.

18. The semiconductor device of claim 12, wherein the n-channel device and the p-channel device have the same n-type gate, and the gate doping concentration of the n-type gate in the n-channel device is higher than that of the p-channel device.

19. The semiconductor device of claim 12, wherein the n-channel device and the p-channel device have the same p-type gate, and the gate doping concentration of the p-type gate in the p-channel device is higher than that of the n-channel device.