Thin film semiconductor device and method of manufacturing the same, electro-optical device, and electronic apparatus

• US 20060017139A1
• Filed: 06/08/2005
• Published: 01/26/2006
• Est. Priority Date: 07/23/2004
• Status: Abandoned Application

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Eguchi, Tsukasa, Fujita, Shin, Matsumoto, Tomotaka
• Application Number:
  US11/147,250
• Publication Number:
  US 20060017139A1
• Time in Patent Office: Days
• US Class Current: 257/656
• CPC Class Codes: G02F 1/136204 Arrangements to prevent high voltage or static electricity failures
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 29/7391 Gated diode structures
• CPC Class Codes: H01L 29/868 PIN diodes

Abstract

A thin film semiconductor device includes a substrate and a semiconductor film formed on the substrate. The thin film semiconductor device further includes a protective circuit element having a PIN diode having the semiconductor film, and a floating electrode disposed opposite to an I layer of the PIN diode with an insulating film disposed therebetween.

Claims

1. A thin film semiconductor device comprising:

a substrate;

a semiconductor film formed on the substrate; and

a protective circuit element that includes a PIN diode having the semiconductor film, and a floating electrode disposed opposite to an I layer of the PIN diode with an insulating film interposed therebetween.

5. The thin film semiconductor device according to claim 1,

wherein the floating electrode and the I layer of the PIN diode are formed approximately at the same location in plan view.

6. The thin film semiconductor device according to claim 1,

wherein the PIN diode has a low concentration impurity region, which has an impurity concentration lower than that of a P layer or a N layer, between the P layer and the I layer or between the N layer and the I layer.

7. The thin film semiconductor device according to claim 6,

wherein the low concentration impurity region is formed in a region where the low concentration impurity region overlaps the floating electrode in plan view.

8. The thin film semiconductor device according to claim 1,

wherein the floating electrode disposed opposite to the I layer of the PIN diode with the insulating film interposed therebetween has a portion where the floating electrode overlaps some of the P layer or the N layer of the PIN diode.

15. An electro-optical device comprising the thin film semiconductor device according to claim 1.

16. An electronic apparatus comprising the electro-optical device according to claim 15.

2. A thin film semiconductor device comprising:

a main circuit unit having a semiconductor element;

a terminal unit extending from the main circuit unit; and

a protective circuit unit disposed between the main circuit unit and the terminal unit,

wherein all of the main circuit, the terminal unit, and the protective circuit are formed on a substrate, and

the protective circuit unit includes a protective circuit element that includes a PIN diode having the semiconductor film, and a floating electrode disposed opposite to an I layer of the PIN diode with an insulating film interposed therebetween.

3. The thin film semiconductor device according to claim 2,

wherein the semiconductor film constituting the PIN diode and a semiconductor film constituting the semiconductor element of the main circuit unit is are formed in the same layer on the substrate.

4. The thin film semiconductor device according to claim 2,

wherein the semiconductor element provided in the main circuit unit is a thin film transistor, and

a conductive film constituting the floating electrode and a conductive film constituting a gate electrode of the thin film transistor are formed in the same layer on the substrate.

9. The thin film semiconductor device according to claim 2,

wherein the protective circuit element is directly connected to the terminal unit.

10. A method of manufacturing a thin film semiconductor device having a substrate and a semiconductor film formed on the substrate, the method comprising:

forming a protective circuit element,

wherein the forming of the protective circuit element includes;

forming an insulating film on the semiconductor film formed on the substrate;

forming a conductive film on the insulating film to form a floating electrode overlapping the semiconductor film in plan view; and

forming a P layer, an N layer, and an I layer in the semiconductor film by introducing an impurity into the semiconductor film using the floating electrode as a mask to form a PIN diode.

11. A method of manufacturing a thin film semiconductor device including a main circuit unit having a semiconductor element, a terminal unit extending from the main circuit unit, and a protective circuit unit disposed between the main circuit unit and the terminal unit, all of which are formed on a substrate, the method comprising:

forming the protective circuit unit which includes forming of a protective circuit element,

wherein the forming of the protective circuit element includes;

forming an insulating film on the semiconductor film formed on the substrate;

forming a conductive film on the insulating film to form a floating electrode overlapping the semiconductor film in plan view; and

forming a P layer, an N layer, and an I layer in the semiconductor film by introducing an impurity into the semiconductor film using the floating electrode as a mask to form a PIN diode.

12. The method of manufacturing a thin film semiconductor device according to claim 11,

wherein the main circuit unit includes a TFT having a semiconductor film and a gate electrode opposite to the semiconductor film with an insulating film interposed therebetween,

the semiconductor film constituting the TFT and a semiconductor film constituting the protective circuit element are formed in the same process, and

the gate electrode constituting the TFT and the floating electrode constituting the protective circuit element are formed in the same process.

13. The method of manufacturing a thin film semiconductor device according to claim 12,

wherein a source or drain of the TFT, and the P layer or the N layer of the PIN diode are formed in the same impurity introducing process.

14. The method of manufacturing a thin film semiconductor device according to claim 11,

wherein in the impurity introducing process, a low concentration impurity region having a lower impurity concentration than that of a neighboring impurity introduction region is formed in the semiconductor film of the TFT and the semiconductor film of the protective circuit element.