Programmable low noise amplifier and method

• US 20060017506A1
• Filed: 07/26/2004
• Published: 01/26/2006
• Est. Priority Date: 07/26/2004
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Koen, Myron J., Venkataraman, Harish
• Granted Patent: US 7,151,409 B2
• Time in Patent Office: Days
• US Class Current: 330/254
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602
• CPC Class Codes: H03G 1/0023 in emitter-coupled or cascode amplifiers H03G1/0029 takes precedence
• CPC Class Codes: H03G 1/0029 using FETs
• CPC Class Codes: H03G 1/0088 using discontinuously variable devices, e.g. switch-operated

Abstract

A programmable gain low noise amplifier includes a tail current transistor (Q3) having a source coupled to a first reference voltage (VDD) and a drain coupled to a tail current conductor (18) and, in a differential input embodiment, a plurality of pairs (Q4,5, Q7,8, Q10,11, Q13,14) of differentially coupled input transistors. Each pair includes a first input transistor having a gate coupled to a first input conductor (19A) and a drain coupled to a first output conductor (26A) and a second input transistor having a gate coupled to a second input conductor (19B), a source coupled to a source of the first transistor, and a drain coupled to a second output conductor (26B). The sources of the first and second input transistors of some or all of the pairs are selectively coupled to the tail current conductor (18) in it response to corresponding gain control signals (B1,2,3).

Claims

1. A programmable gain low noise amplifier comprising:

(a) a tail current transistor having a source coupled to a first reference voltage and a drain coupled to a tail current conductor;

(b) a plurality of input transistors each having a gate coupled to an input conductor, a drain coupled to an output conductor, and a source coupled to the tail current conductor;

(c) a plurality of switch transistors for selectively coupling the sources of at least some of the input transistors to the tail current conductor in response to a plurality of gain selection signals, respectively; and

(d) a load resistor coupled between the output conductor and a second reference voltage.

2. The programmable gain low noise amplifier of claim 1 wherein the channel-length-to-channel-width ratios of the various input transistors are progressively larger.

3. The programmable gain low noise amplifier of claim 1 including a bias current control circuit including an operational amplifier having a first input coupled to a third reference voltage, an output coupled to a gate of a control transistor having a drain coupled to the gate and the drain of the current mirror control transistor and a source coupled to a second input of the operational amplifier and to a first terminal of a control resistor having a second terminal coupled to the second control voltage.

4. The programmable gain low noise amplifier of claim 3 wherein the control resistor is composed of the same resistive material as the load resistor so that accurate tracking of the tail current with respect to temperature and process variations is achieved.

5. The programmable gain low noise amplifier circuit of claim 1 including switch select circuitry operative in response to a gain select input to produce the gain selection signals on the gates of the plurality of switch transistors, respectively.

6. A programmable gain low noise amplifier comprising:

(a) a tail current transistor having a source coupled to a first reference voltage and a drain coupled to a tail current conductor;

(b) a plurality of pairs of differentially coupled transistors, each pair including a first transistor having a gate coupled to a first input conductor and a drain coupled to a first output conductor and a second transistor having a gate coupled to a second input conductor, a source coupled to a source of the first transistor, and a drain coupled to a second output conductor, the sources of the first and second transistors of each pair being coupled to the tail current conductor;

(c) a plurality of switch transistors for coupling the sources of the first and second transistors of at least some of the pairs to the tail current conductor in response to a plurality of gain selection signals, respectively; and

(d) a first load resistor coupled between the first output conductor and a second reference voltage and a second load resistor coupled between a second output conductor and the second reference voltage.

7. The programmable gain low noise amplifier of claim 6 wherein a channel-length-to-channel-width ratio of the first transistor in each pair is equal to a channel-length-to-channel-width ratio of the second transistor in that pair, and wherein the channel-length-to-channel-width ratios of the first and second transistors of the various pairs are progressively larger.

8. The programmable gain low noise amplifier of claim 6 wherein the switch transistors couple the sources of the first and second transistors of all but a first one of the pairs, respectively, to the tail current conductor, the sources of the first and second transistors of the first pair being coupled directly to the tail current conductor.

9. The programmable gain low noise amplifier of claim 6 wherein the switch transistors couple the sources of the first and second transistors of all of the pairs, respectively, to the tail current conductor.

10. The programmable gain low noise amplifier of claim 6 wherein the first transistors and the second transistors are P-channel transistors.

11. The programmable gain low noise amplifier of claim 6 wherein the switch transistors are P-channel transistors.

12. The programmable gain low noise amplifier of claim 6 wherein the tail current transistor is a P-channel transistor having a gate coupled to a gate and drain of a current mirror control transistor having a source coupled to the first reference voltage.

13. The programmable gain low noise amplifier of claim 12 including a bias current control circuit including an operational amplifier having a first input coupled to a third reference voltage, an output coupled to a gate of a control transistor having a drain coupled to the gate and the drain of the current mirror control transistor and a source coupled to a second input of the operational amplifier and to a first terminal of a control resistor having a second terminal coupled to the second control voltage.

14. The programmable gain low noise amplifier of claim 13 wherein the control resistor is composed of the same resistive material as the first and second load resistors so that accurate tracking of the tail current with respect to temperature and process variations is achieved.

15. The programmable gain low noise amplifier of claim 6 including four pairs of differentially coupled transistors.

16. The programmable gain low noise amplifier circuit of claim 6 including switch select circuitry operative in response to a gain select input to produce the gain selection signals on the gates of the plurality of switch transistors, respectively.

17. A programmable gain low noise amplifier comprising:

(a) a tail current transistor having a source coupled to a first reference voltage and a drain coupled to a tail current conductor;

(b) a plurality of input transistors each having a gate coupled to a first input conductor and a drain coupled to a first output conductor;

(c) means for selectively coupling the sources of at least some of the input transistors to the tail current conductor in response to a plurality of gain selection signals, respectively; and

(d) a load resistor coupled between the first output conductor and a second reference voltage.

18. A method of providing programmable gain in a low noise amplifier, comprising:

(a) generating a tail current in a tail current transistor having a source coupled to a first reference voltage and a drain coupled to a tail current conductor;

(b) providing a plurality of input transistors each having a gate coupled to an input conductor and a drain coupled to a first output conductor; and

(c) selectively coupling the sources of at least some of the input transistors to the tail current conductor in response to a plurality of gain selection signals, respectively.

19. The method of claim 18 wherein step (b) includes providing a channel-length-to-channel-width ratio of the first transistor in each pair equal to a channel-length-to-channel-width ratio of the second transistor in that pair, and providing progressively larger channel-length-to-channel-width ratios of the first and second transistors of the various pairs.

20. A programmable gain low noise amplifier, comprising:

(a) means for generating a tail current in a tail current transistor having a source coupled to the first reference voltage and a drain coupled to a tail current conductor;

(b) a plurality of input transistors each including an input transistor having a gate coupled to a first input conductor and a drain coupled to a first output conductor;

(c) a load device coupled between the output conductor and a second reference voltage; and

(d) means for selectively coupling the sources of at least some of the input transistors to the tail current conductor in response to a plurality of selection signals, respectively, by means of a plurality of switch transistors.

21. A programmable gain low noise amplifier comprising:

(a) a tail current transistor having a source coupled to a first reference voltage and a drain coupled to a tail current conductor;

(b) a plurality of pairs of differentially coupled transistors, each pair including a first transistor having a gate coupled to a first input conductor and a drain coupled to a first output conductor and a second transistor having a gate coupled to a second input conductor, a source coupled to a source of the first transistor, and a drain coupled to a second output conductor, the sources of the first and second transistors of each pair being coupled to the tail current conductor;

(c) means for coupling the sources of the first and second transistors of at least some of the pairs to the tail current conductor in response to a plurality of gain selection signals, respectively; and

(d) a first load resistor coupled between the first output conductor and a second reference voltage and a second load resistor coupled between a second output conductor and the second reference voltage.

22. A method of providing programmable gain in a low noise amplifier, comprising:

(a) generating a tail current in a tail current transistor having a source coupled to a first reference voltage and a drain coupled to a tail current conductor;

(b) providing a plurality of pairs of differentially coupled transistors, each pair including a first transistor having a gate coupled to a first input conductor and a drain coupled to a first output conductor and a second transistor having a gate coupled to a second input conductor, a source coupled to a source of the first transistor, and a drain coupled to a second output conductor; and

(c) selectively coupling the sources of the first and second transistors of at least some of the pairs to the tail current conductor in response to a plurality of gain selection signals, respectively.

23. A programmable gain low noise amplifier, comprising:

(a) means for generating a tail current in a tail current transistor having a source coupled to the first reference voltage and a drain coupled to a tail current conductor;

(b) a plurality of pairs of differentially coupled transistors, each pair including a first transistor having a gate coupled to a first input conductor and a drain coupled to a first output conductor and a second transistor having a gate coupled to a second input conductor, a source coupled to a source of the first transistor, and a drain coupled to a second output conductor;

(c) means for coupling the sources of the first and second transistors to the tail current conductor in response to in response to a plurality of selection signals, respectively;

(d) a first load device coupled between the first output conductor and a second reference voltage and a second load device coupled between a second output conductor and the second reference voltage; and

(e) means for selectively coupling the sources of the first and second transistors of at least some of the pairs to the tail current conductor in response to a plurality of selection signals, respectively, by means of a plurality of switch transistors.