Probe card

• US 20060022688A1
• Filed: 12/21/2004
• Published: 02/02/2006
• Est. Priority Date: 07/29/2004
• Status: Abandoned Application

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Togashi, Kenji, Giga, Tomohiro
• Application Number:
  US11/016,943
• Publication Number:
  US 20060022688A1
• Time in Patent Office: Days
• US Class Current: 324/750.250
• CPC Class Codes: G01R 31/2889 Interfaces, e.g. between probe and tester G01R31/31905 and G01R1/07364 take precedence

Abstract

A probe card is commonly used for a plurality of kinds of semiconductor chips. The probe card has a probe card substrate and a multi-layer structure interconnection substrate connected to the probe card substrate. A plurality of probe needles extend from the multi-layer structure interconnection substrate. At least one power supply plane is provided between the multi-layer structure interconnection substrate and extreme ends of the probe needles. The power supply plane is configured and arranged to be exchangeable with a different plane.

Claims

1. A probe card comprising:

a probe card substrate;

a multi-layer structure interconnection substrate connected to said probe card substrate;

a plurality of probe needles extending from said multi-layer structure interconnection substrate; and

at least one power supply plane provided between said multi-layer structure interconnection substrate and extreme ends of said probe needles,

wherein said power supply plane is configured and arranged to be exchangeable.

2. The probe card as claimed in claim 1, wherein said power supply plane has a plurality of through holes through which said probe needles extend, and at least a surface of said power supply pane facing an object to be tested is covered by a solid metal.

3. The probe card as claimed in claim 2, wherein inner surfaces of said through holes of said power supply plane are applied with an insulating treatment.

4. The probe card as claimed in claim 1, further comprising a guide plane for positioning said probe needles is provided between said power supply plane and said extreme ends of said probe needles.

5. The probe card as claimed in claim 4, wherein said guide plane has a monitor for positioning and a hole for positioning.

6. The probe card as claimed in claim 5, wherein said monitor for positioning includes at least one of send pad and a positioning mark for positing said through holes for said probe needles.

7. A probe card comprising:

a probe card substrate;

a plurality of probe needles extending from said probe card substrate; and

at least one power supply plane provided between said probe card substrate and extreme ends of said probe needles,

wherein said power supply plane is configured and arranged to be exchangeable.

8. The probe card as claimed in claim 7, wherein said power supply plane ha a plurality of through holes through which said probe needles extend, and at least a surface of said power supply pane facing an object to be tested is covered by a solid metal.

9. The probe card as claimed in claim 8, wherein inner surfaces of said through holes of said power supply plane are applied with an insulating treatment.

10. The probe card as claimed in claim 7, further comprising a guide plane for positioning said probe needles is provided between said power supply plane and said extreme ends of said probe needles.

11. The probe card as claimed in claim 10, wherein said guide plane has a monitor for positioning and a hole for positioning.

12. The probe card as claimed in claim 11, wherein said monitor for positioning includes at least one of send pad and a positioning mark for positing said through holes for said probe needles.

13. A method of testing a semiconductor chip using a probe card comprising a probe card substrate, a multi-layer structure interconnection substrate and a plurality of probe needles, the method comprising:

placing at least one power supply plane between said multi-player structure interconnection substrate and extreme ends of said probe needles, said power supply plane being provided with contact pads being located in an arrangement corresponding to an arrangement of power supply pads of said semiconductor chip;

contacting said probe needles with electrode pads of said semiconductor chip; and

performing a test on said semiconductor chip.

14. A method of testing a semiconductor chip using a probe card comprising a probe card substrate and a plurality of probe needles, the method comprising:

placing at least one power supply plane between said probe card and extreme ends of said probe needles, said power supply plane being provided with contact pads being located in an arrangement corresponding to an arrangement of power supply pads of said semiconductor chip;

contacting said probe needles with electrode pads of said semiconductor chip; and

performing a test on said semiconductor chip.