Selectively strained MOSFETs to improve drive current
First Claim
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1. A method for introducing strain into a MOSFET channel region comprising the steps of:
- providing a first and second MOSFET device having a respective first polarity and second polarity opposite from the first polarity selected from the group consisting of P and N type on a semiconducting substrate;
forming a first stressed nitride layer having a first stress type selected from the group consisting of compressive and tensile stress over the first and second MOSFET device active areas;
removing the first stressed nitride layer overlying the second MOSFET device active area;
forming a second stressed nitride layer having a second stress type opposite the first stress type over the first and second MOSFET device active areas;
removing the second stressed nitride layer overlying the first MOSFET device active area; and
, forming a dielectric insulating layer over the first and second MOSFET device active areas having a less compressive or tensile stress.
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Abstract
A MOSFET device pair with improved drive current and a method for producing the same to selectively introduce strain into a respective N-type and P-type MOSFET device channel region, the method including forming a compressive stressed nitride layer on over the P-type MOSFET device and a tensile stressed nitride layer on the N-type MOSFET device followed by forming a PMD layer having a less compressive or tensile stress.
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Citations
34 Claims
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1. A method for introducing strain into a MOSFET channel region comprising the steps of:
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providing a first and second MOSFET device having a respective first polarity and second polarity opposite from the first polarity selected from the group consisting of P and N type on a semiconducting substrate;
forming a first stressed nitride layer having a first stress type selected from the group consisting of compressive and tensile stress over the first and second MOSFET device active areas;
removing the first stressed nitride layer overlying the second MOSFET device active area;
forming a second stressed nitride layer having a second stress type opposite the first stress type over the first and second MOSFET device active areas;
removing the second stressed nitride layer overlying the first MOSFET device active area; and
,forming a dielectric insulating layer over the first and second MOSFET device active areas having a less compressive or tensile stress. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method for forming a contact etch stop layer and overlying PMD layer for selectively introducing strain into a MOSFET channel region comprising the steps of:
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providing a first and second MOSFET device having a respective first polarity and second polarity opposite from the first polarity selected from the group consisting of P and N type on a semiconducting substrate;
forming a first stressed nitride contact etch stop (CESL) layer according to a mixed frequency PECVD method having a first stress type selected from the group consisting of compressive and tensile stress over the first and second MOSFET device active area;
removing a portion of the first stressed nitride CESL layer portion overlying the second MOSFET device active area;
forming a second stressed nitride CESL layer having a second stress type according to a mixed frequency PECVD method opposite the first stressed nitride layer over the first and second MOSFET device active areas;
removing a portion of the second stressed nitride CESL layer overlying the first MOSFET device active area; and
,forming a pre-metal dielectric (PMD) layer over the first and second MOSFET device active areas having a less compressive or tensile stress. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. A MOSFET device pair with improved drive current comprising:
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an N-type polarity MOSFET device and a P-type polarity MOSFET device disposed over respective active areas on a semiconductor substrate;
a first stressed nitride layer having a tensile stress over the N-type polarity MOSFET device active area;
a second stressed nitride layer having a compressive stress over the P-type polarity MOSFET device active area; and
,a dielectric insulating layer overlying the respective MOSFET device active areas having a less compressive or tensile stress. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33, 34)
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Specification