Dual damascene diffusion barrier/liner process with selective via-to-trench-bottom recess
First Claim
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1. A method of fabricating an integrated circuit, comprising the steps of:
- forming a dielectric layer;
forming a trench and a via in said dielectric layer;
depositing a first barrier layer over said dielectric layer including in said trench and said via;
performing a re-sputter etch in a physical vapor deposition tool with an intermediate DC target power, wherein the re-sputter etch results in a higher etch rate at a bottom of said via than at a bottom of said trench;
depositing a second barrier layer over said first barrier layer.
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Abstract
A method for fabricating a barrier layer. A first barrier layer (124) is deposited over a dielectric (104) including in a trench (108) and via (106). A re-sputtering process is then performed to remove said first barrier layer (124) from a bottom of the via (106) without substantially reducing a thickness of said first barrier layer (124) at a bottom of the trench (108) using an intermediate DC target power. A second barrier layer (126) is then deposited.
124 Citations
19 Claims
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1. A method of fabricating an integrated circuit, comprising the steps of:
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forming a dielectric layer;
forming a trench and a via in said dielectric layer;
depositing a first barrier layer over said dielectric layer including in said trench and said via;
performing a re-sputter etch in a physical vapor deposition tool with an intermediate DC target power, wherein the re-sputter etch results in a higher etch rate at a bottom of said via than at a bottom of said trench;
depositing a second barrier layer over said first barrier layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of fabricating an integrated circuit, comprising the steps of:
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forming a dielectric layer;
forming a trench and a via in said dielectric layer;
depositing a first barrier layer over said dielectric layer including in said trench and said via;
re-sputtering said first barrier layer to recess a bottom of said via without recessing a bottom of said trench, wherein said re-sputtering process uses an intermediate DC target power to approximately balance a deposition component and an etch component of said re-sputtering process at the bottom of the trench; and
depositing a second barrier layer over said first barrier layer. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification