Process controller for semiconductor manufacturing

• US 20060025935A1
• Filed: 07/27/2004
• Published: 02/02/2006
• Est. Priority Date: 07/27/2004
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Shen, You-Wei, Chen, Young-Cheng
• Granted Patent: US 7,133,788 B2
• Time in Patent Office: Days
• US Class Current: 702/30
• CPC Class Codes: G03F 7/70625 Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present disclosure relates generally to the field of semiconductor manufacturing. In one example, in a production flow of low-volume, high-precision semiconductor products, a method for controlling critical dimensions of a semiconductor product during a semiconductor processing operation in the production flow, the semiconductor processing operation requiring a desired energy value to achieve the critical dimensions includes: measuring a previously formed critical dimension on the product; calculating a first energy value based on the measured critical dimension and a desired critical dimension for the semiconductor processing operation; and obtaining the desired energy value based on the calculated first energy value and a previously-obtained desired energy for the semiconductor processing operation performed on a prior product in the production flow.

Claims

1. In a production flow of low-volume, high-precision semiconductor products, a method for controlling critical dimensions of a semiconductor product during a semiconductor processing operation in the production flow, the semiconductor processing operation requiring a desired energy value to achieve the critical dimensions, the method comprising:

measuring a previously formed critical dimension on the product;

calculating a first energy value based on the measured critical dimension and a desired critical dimension for the semiconductor processing operation; and

obtaining the desired energy value based on the calculated first energy value and a previously-obtained desired energy for the semiconductor processing operation performed on a prior product in the production flow.

2. The method of claim 1 wherein calculating the first energy value comprises obtaining the result of the following:

(a targeted critical dimension−

a mean of measured critical dimension data)*a critical dimension slope value supplied by a critical dimension controller.

3. The method of claim 1 wherein the product is a semiconductor wafer, and the prior product is a semiconductor wafer that was immediately processed by a same system as being used to perform the semiconductor processing operation.

4. The method of claim 1 wherein the obtained desired energy value is also based on a weight of the product.

5. The method of claim 4 wherein the obtained desired energy value is also based on a second energy value supplied by a critical dimension controller.

6. The method of claim 5 wherein the obtaining comprises calculating the following:

the desired energy value=weight*the desire energy value for immediately prior product+(1−

weight)*(the second energy value+the first energy value).

7. A method for controlling critical dimensions of a semiconductor product during a semiconductor processing operation in a production flow, the semiconductor processing operation requiring a new correction energy value to achieve the critical dimensions, the method comprising:

supplying a tool ratio value based on a lithography system;

obtaining an energy figure based on a first predetermined energy value for a lithography system and a second predetermined energy value for a product; and

providing a new correction energy based on a plurality of elements including the tool ratio value, the energy figure, and a desired energy value wherein the desired energy value is based on a calculated first energy value and a previously-obtained desired energy for a semiconductor processing operation performed on a prior product in a production flow.

8. The method of claim 7 wherein the energy figure equals to the sum of the first predetermined energy value and the second predetermined energy value.

9. The method of claim 7 wherein the tool ratio is determined by performance of lithography process tools.

10. The method of claim 7 wherein the product is a semiconductor wafer, and the prior product is a semiconductor wafer that was previously processed by a same system as being used to perform the semiconductor processing operation.

11. The method of claim 7 wherein the providing comprises obtaining data from multiplying the energy figure by the tool ratio wherein the tool ratio is determined by performance of lithography process tools.

12. The method of claim 7 wherein the providing comprises calculating the following:

the new correction energy=the desired energy value−

(the first predetermined energy value+the second predetermined energy value)*the tool ratio, wherein the tool ratio is determined by performance of lithography process tools.

13. The method of claim 7 wherein the new correction energy is applied to low-volume and high-quality semiconductor products.

14. A method for controlling critical dimensions of low-volume and high-precision semiconductor products during a semiconductor processing operation in a production flow, the semiconductor processing operation requiring a new correction energy value to achieve the critical dimensions, the method comprising:

measuring a previously formed critical dimension on a product;

obtaining a desired energy value for the product wherein the desired energy value is based on a calculated first energy value and a previously-obtained desired energy for a semiconductor processing operation performed on a prior product in a production flow;

supplying an accumulated error between a targeted critical dimension (“

CD Target”

) and mean of measured critical dimension data (“

CD Mean”

); and

calculating a new correction energy based on a plurality of elements including the desired energy figure, and a tool ratio value based on a lithography system.

15. The method of claim 14 wherein the product is a semiconductor wafer, and the prior product is a semiconductor wafer that was previously processed by a same system as being used to perform the semiconductor processing operation.

16. The method of claim 14 wherein the obtaining includes calculating the following:

the desired energy value=weight*a desired energy value for an immediately prior product+(1−

weight)*(a second energy value supplied by a critical dimension controller+the first energy value), wherein the first energy value is based on CD Target and CD Mean for the semiconductor processing operation.

17. The method of claim 16 wherein the first energy value equals to the result of (CD Target−

CD Mean)*the second energy value supplied by the critical dimension controller/CD Target.

18. The method of claim 14 wherein the supplying includes utilizing a dynamic 3-dimensional array.

19. The method of claim 14 wherein the supplying includes obtaining a new tool ratio.

20. The method of claim 14 wherein the calculating includes obtaining the following:

the new correction energy=the desired energy−

(a first predetermined energy value for a lithography system+a second predetermined energy value for a product)*the tool ratio.