Cache memory usable as scratch pad storage
First Claim
1. A processor adapted to couple to external memory, comprising:
- a controller;
data storage operated by said controller, said data storage usable to store local variables and temporary data and said data storage configurable to operate in either a cache policy mode in which a miss results in an access of the external memory or in a scratch pad policy mode in which a miss does not result in an access of the external memory;
wherein said data storage comprises a first portion and a second portion, and wherein only one of said portions is active at a time for storing said local variables, the non-active portion being unusable for storing the local variables;
wherein, when the active portion does not have sufficient capacity for additional local variables to be stored therein, the other portion becomes the active portion for storing local variables; and
wherein, when one portion is the active portion, the other portion is used to store the temporary data, such other portion being sufficiently large to contain all desired such temporary data.
1 Assignment
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Accused Products
Abstract
A processor adapted to couple to external memory. The processor comprises a controller and data storage. The data storage is usable to store local variables and temporary data and is configurable to operate in either a cache policy mode in which a miss results in an access of the external memory or in a scratch pad policy mode in which a miss does not result in an access of the external memory. The data storage comprises first and second portions, and wherein only one of said portions is active at a time for storing said local variables. When the active portion does not have sufficient capacity for additional local variables, the other portion becomes the active portion for storing local variables. When one portion is the active portion, the other portion is used to store the temporary data and such other portion is sufficiently large to contain the temporary data.
27 Citations
16 Claims
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1. A processor adapted to couple to external memory, comprising:
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a controller;
data storage operated by said controller, said data storage usable to store local variables and temporary data and said data storage configurable to operate in either a cache policy mode in which a miss results in an access of the external memory or in a scratch pad policy mode in which a miss does not result in an access of the external memory;
wherein said data storage comprises a first portion and a second portion, and wherein only one of said portions is active at a time for storing said local variables, the non-active portion being unusable for storing the local variables;
wherein, when the active portion does not have sufficient capacity for additional local variables to be stored therein, the other portion becomes the active portion for storing local variables; and
wherein, when one portion is the active portion, the other portion is used to store the temporary data, such other portion being sufficiently large to contain all desired such temporary data. - View Dependent Claims (2, 3, 4, 5)
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6. A system, comprising:
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a communications transceiver;
a first memory;
a controller communicatively coupled to said communications transceiver and said memory; and
a second memory operated by said controller, said second memory usable to store local variables and temporary data and said second memory configurable to operate in either a cache policy mode in which a miss results in an access of the first memory or in a scratch pad policy mode in which a miss does not result in an access of the first memory;
wherein said second memory comprises a first portion and a second portion, and wherein only one of said portions is active at a time for storing the local variables, the non-active portion being unusable for storing the local variables;
wherein, when the active portion does not have sufficient capacity for additional local variables to be stored therein, the other portion becomes the active portion for storing local variables; and
wherein, when one portion is the active portion, the other portion is used to store the temporary data, such other portion being sufficiently large to contain all desired such temporary data. - View Dependent Claims (7, 8, 9, 10, 11)
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12. A method, comprising:
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using only a first portion of a cache memory data array to store local variables until said first portion has insufficient capacity for storing additional local variables, said cache memory data array comprising the first portion and a second portion;
once the first portion has insufficient capacity for storing additional local variables, using only the second portion of the cache memory data to store said additional local variables and not using the first portion;
when the second portion has insufficient capacity for storing additional local variables, copying the local variables from only the first portion to external memory; and
using one of the first or second portions to store temporary data, wherein the first or second portion so used to store the temporary data being sufficiently large to contain all desired such temporary data. - View Dependent Claims (13, 14, 15, 16)
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Specification