Stack type semiconductor apparatus package and manufacturing method thereof

• US 20060027841A1
• Filed: 08/01/2005
• Published: 02/09/2006
• Est. Priority Date: 08/04/2004
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Tamaki, Kazuo
• Granted Patent: US 7,239,164 B2
• Time in Patent Office: Days
• US Class Current: 257/286
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/0557 the external layer being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/48475 connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85051 Forming additional members, e.g. for "wedge-on-ball", "ball-on-wedge", "ball-on-ball" connections
• CPC Class Codes: H01L 2225/0651 : Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06517 : Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06558 : the devices having passive surfaces facing each other, i.e. in a back-to-back arrangement
• CPC Class Codes: H01L 2225/06586 : Housing with external bump or bump-like connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/03 : all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
• CPC Class Codes: H01L 25/0652 : the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/07811 : Extrinsic, i.e. with electrical conductive fillers
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA

Abstract

A stack type semiconductor apparatus package includes: (i) a first circuit substrate, (ii) a semiconductor apparatus package mounted on the first circuit substrate, (iii) a semiconductor apparatus, and (iv) a sealing resin for covering them. The first circuit substrate has a surface on which first connecting pads and second connecting pads are provided. The first connecting pads are connected to first external input/output terminals of the semiconductor apparatus package, and the second connecting pads are connected to electrodes of the first semiconductor apparatus, respectively. On a rear surface of the first circuit substrate, there are provided second external input/output terminals connected to the first connecting pads and the second connecting pads. The semiconductor apparatus package includes: a second circuit substrate, and a second semiconductor apparatus mounted on the second circuit substrate. On a surface of the second circuit substrate, there are provided third connecting pads connected to electrodes of the second semiconductor apparatus, respectively. The first external input/output terminals are provided on a rear surface of the second circuit substrate. This makes it possible to provide a stack type semiconductor apparatus package that can be easily manufactured with inexpensive cost.

Claims

1. A stack type semiconductor apparatus package, comprising:

at least one semiconductor apparatus package, which has a plurality of first input/output terminals;

a first circuit substrate, on which the semiconductor apparatus package is mounted, the first circuit substrate having a first face and a second face;

at least one first semiconductor apparatus, which is stacked on the semiconductor apparatus package and which has a plurality of first electrodes;

a plurality of first connecting pads, which are so provided on the first face of the first circuit substrate as to respectively correspond to the first external input/output terminals of the semiconductor apparatus package, and which are electrically connected to the first external input/output terminals of the semiconductor apparatus package respectively;

a plurality of second connecting pads, which are so provided on the first face of the first circuit substrate as to be provided on an outer side of the first connecting pads, and which are electrically connected to the first electrodes of the first semiconductor apparatus respectively;

a plurality of second external input/output terminals, which are provided on the second face of the first circuit substrate, and which are made up of (i) external input/output terminals electrically connected to the first connecting pads in a predetermined manner, and (ii) external input/output terminals electrically connected to the second connecting pads in a predetermined manner; and

a first resin for covering the first semiconductor apparatus and the semiconductor apparatus package,

the semiconductor apparatus package including;

a second semiconductor apparatus, which has a plurality of second electrodes;

a second circuit substrate, on which the second semiconductor apparatus is mounted, the second circuit substrate having a third face and a fourth face;

a plurality of third connecting pads, which are provided on the third face of the second circuit substrate, and which are electrically connected to the second electrodes of the second semiconductor apparatus respectively; and

a second resin for covering the second semiconductor apparatus,

the first external input/output terminals being provided on the fourth face of the second circuit substrate, and being electrically connected to the third connecting pads, respectively.

2. The stack type semiconductor apparatus package as set forth in claim 1, further comprising:

a thin metal wire for connecting each of the second connecting pads to a corresponding first electrode of the first semiconductor apparatus.

3. The stack type semiconductor apparatus package as set forth in claim 1, wherein:

the semiconductor apparatus package and the first semiconductor apparatus are adhered to each other via an adhesive material.

4. The stack type semiconductor apparatus package as set forth in claim 2, further comprising:

a first thin metal wire connecting member, provided on a resin seal face of the semiconductor apparatus package,

wherein;

the first thin metal wire connecting member includes a first wire, connected to (i) each of the first electrodes of the first semiconductor apparatus, and (ii) each of the second connecting pads via the thin metal wire.

5. The stack type semiconductor apparatus package as set forth in claim 2, further comprising:

a second thin metal wire connecting member, provided on the first face of the first circuit substrate,

wherein;

the second thin metal wire connecting member includes a second wire, connected to (i) each of the first electrodes of the first semiconductor apparatus, and (ii) each of the second connecting pads via the thin metal wire.

6. The stack type semiconductor apparatus package as set forth in claim 2, wherein:

the first electrodes are provided on a rear face of a face, on which the first circuit substrate is provided, of the first semiconductor apparatus; and

each of the second connecting pads is provided so as to be higher than the face on which the first electrodes are provided.

7. The stack type semiconductor apparatus package as set forth in claim 1, wherein:

a third resin is provided in a void between the semiconductor apparatus package and the first circuit substrate.

8. The stack type semiconductor apparatus package as set forth in claim 1, wherein:

in a face, on which the first circuit substrate is provided, of the semiconductor apparatus package,

a face of each of the first external input/output terminals projects from a face of a portion in which no first external input/output terminal is provided.

9. The stack type semiconductor apparatus package as set forth in claim 1, wherein:

projection electrodes, which are solder balls and which are respectively connected to the first connecting pads, are provided on the first external input/output terminals.

10. The stack type semiconductor apparatus package as set forth in claim 1, wherein:

in the first face of the first circuit substrate,

a face of each of the first connecting pads projects from a portion in which no first connecting pad is provided.

11. The stack type semiconductor apparatus package as set forth in claim 1, wherein:

the second semiconductor apparatus is a memory element.

12. The stack type semiconductor apparatus package as set forth in claim 1, wherein:

the first semiconductor apparatus is a logic element.

13. The stack type semiconductor apparatus package as set forth in claim 1, wherein:

the first face of the first circuit substrate has a recess portion;

the first connecting pads are provided in the recess portion; and

the second connecting pads are provided in a portion other than the recess portion of the first face of the first circuit substrate, which portion is higher than the face on which the first connecting pads are provided.

14. A method for manufacturing a stack type semiconductor apparatus package,

said package including:

at least one semiconductor apparatus package, which has a plurality of first input/output terminals;

a first circuit substrate, on which the semiconductor apparatus package is mounted, the first circuit substrate having a first face and a second face;

at least one first semiconductor apparatus, which is stacked on the semiconductor apparatus package and which has a plurality of first electrodes;

a plurality of first connecting pads, which are so provided on the first face of the first circuit substrate as to respectively correspond to the first external input/output terminals of the semiconductor apparatus package;

a plurality of second connecting pads, which are so provided on the first face of the first circuit substrate as to be provided on an outer side of the first connecting pads; and

a plurality of second external input/output terminals, which are provided on the second face of the first circuit substrate, and which are made up of (i) external input/output terminals electrically connected to the first connecting pads in a predetermined manner, and (ii) external input/output terminals electrically connected to the second connecting pads in a predetermined manner;

said semiconductor apparatus package including;

a second semiconductor apparatus, which has a plurality of second electrodes;

a second circuit substrate, on which the second semiconductor apparatus is mounted, the second circuit substrate having a third face and a fourth face;

a plurality of third connecting pads, which are provided on the third face of the second circuit substrate, and which are electrically connected to the second electrodes of the second semiconductor apparatus respectively; and

a second resin for covering the second semiconductor apparatus,

the first external input/output terminals being provided on the fourth face of the second circuit substrate, and being electrically connected to the third connecting pads respectively,

said method, comprising the steps of;

(A) connecting the first external input/output terminals of the semiconductor apparatus package to the first connecting pads provided on the first circuit substrate, by using at least one of heat, load, and a supersonic wave;

(B) electrically connecting the first electrodes of the first semiconductor apparatus to the second connecting pads of the first circuit substrate via a thin metal wire in accordance with a wire bonding method; and

(C) covering the first semiconductor apparatus and the semiconductor apparatus package with a first resin.

15. The method as set forth in claim 14, further comprising the step of:

(D) adhering the first semiconductor apparatus to a resin seal upper face of the semiconductor apparatus package via an adhesive material.

16. The method as set forth in claim 15, wherein the adhesive material is an adhesive sheet,

said method, further comprising the step of:

(E) prior to the step (D), providing an adhesive sheet on the resin seal upper face of the semiconductor apparatus package.

17. The method as set forth in claim 15, wherein the adhesive material is a liquid adhesive material,

said method, further comprising the step of:

(F) prior to the step (D), applying the liquid adhesive material to the resin seal upper face of the semiconductor apparatus package.

18. The method as set forth in claim 15, further comprising the step of:

(G) after the step (A), providing a third resin, which is different from the adhesive material, into a void between the semiconductor apparatus package and the first circuit substrate.

19. The method as set forth in claim 14, further comprising the steps of:

after the step (A),

(H) providing a third resin in (i) a void between the semiconductor apparatus package and the first circuit substrate, and (ii) a resin seal upper face of the semiconductor apparatus package;

(I) mounting the first semiconductor apparatus on the resin seal upper face of the semiconductor apparatus package via the third resin; and

(J) curing, at a time, (i) the third resin provided between the first semiconductor apparatus and the resin seal upper face of the semiconductor apparatus package, and (ii) the third resin provided in the void.

20. The method as set forth in claim 14, further comprising the step of:

prior to the step (A),

(K) providing a third resin in a region of the first circuit substrate, on which region the semiconductor apparatus package is mounted.

21. The method as set forth in claim 14, wherein:

in the step (A), projection electrodes that are solder balls are respectively provided on the first external input/output terminals, and the connecting of the first electrode pads with the respective first external input/output terminals is carried out by melting the projection electrodes.

22. The method as set forth in claim 14, wherein:

in the step (A), projection electrodes that are solder balls are respectively provided on the first external input/output terminals, and the connecting of the first external input/output terminals with the respective first electrode pads is carried out, by pressing the semiconductor apparatus package against the first circuit substrate via a third resin, instead of melting the projection electrodes.

23. The method as set forth in claim 20, wherein:

an anisotropic conductive adhesive agent is used as the third resin.

24. The method as set forth in claim 14, further comprising the step of:

(L) adhering, to a resin seal face of the semiconductor apparatus package, a first thin metal wire connecting member including a first wire,

wherein;

in the step (B), the first wire is electrically connected, via the thin metal wire, to (i) the first electrodes of the first semiconductor apparatus, and (ii) the first connecting pads provided on the first circuit substrate.

25. The method as set forth in claim 14, further comprising:

(M) adhering, to the first face of the first circuit substrate, a second thin metal wire connecting member including a second wire,

wherein;

in the step (B), the second wire is electrically connected, via the thin metal wire, to (i) the first electrodes of the first semiconductor apparatus, and (ii) the first connecting pads provided on the first circuit substrate.

26. The method as set forth in claim 14, wherein:

the first face of the first circuit substrate has a recess portion;

the first connecting pads are provided in the recess portion; and

the second connecting pads are provided on a portion other than the recess portion of the first face of the first circuit substrate, and which face is higher than the face on which the first connecting pads are provided.