Digital communications transmitter with synthesizer-controlled modulation and method therefor

• US 20060029152A1
• Filed: 08/03/2004
• Published: 02/09/2006
• Est. Priority Date: 08/03/2004
• Status: Abandoned Application

• Current Assignee: General Dynamics C4 Systems Incorporated (General Dynamics Corporation)
• Original Assignee: General Dynamics Decision Systems, Inc. (General Dynamics Corporation)
• Inventors: Waldo, Michael Kip Eugene, Torell, Kent Lynn, Kost, Robert Roy
• Application Number:
  US10/910,195
• Publication Number:
  US 20060029152A1
• Time in Patent Office: Days
• US Class Current: 375/295
• CPC Class Codes: H04L 27/2092 with digital generation of the modulated carrier (does not include the modulation of a digitally generated carrier)

Abstract

A low-power digital communications transmitter (20) includes a programmable digital-processing circuit (22), which may be provided by a digital signal processor (DSP), a programmable direct digital synthesizer (DDS), and a constant-envelope, high power amplifier (32). The DDS (24) is programmed to provide pulse-shaping and IF/RF signal modulation functions. The digital-processing circuit (22) produces only one sample per unit interval (134) and is programmed so that the one sample per unit interval (134) is a frequency-profile index symbol (52″) produced from a I,Q baseband symbol (52′). The DDS (24) converts each frequency-profile index symbol (52″) into a frequency profile (130) that controls the frequency of a synthesizer (56) to induce modulation into a periodic output (68) of the synthesizer. Moreover, the frequency profile (130) is configured to confine spectral emissions within a spectral mask (140).

Claims

1. A digital communications transmitter comprising:

a digital-processing circuit configured to generate a digitally-modulated symbol for each unit interval;

a frequency-profiling circuit configured to generate a plurality of digitally-specified frequencies per unit interval in response to each digitally-modulated symbol, said digitally-specified frequencies being configured to confine radio-frequency (RF) emissions within a predetermined spectral mask;

a digital synthesizer having a frequency input coupled to said frequency-profiling circuit and having a periodic output; and

a digital-to-analog converter having an input responsive to said periodic output of said digital synthesizer.

2. A digital communications transmitter as claimed in claim 1 wherein said frequency-profiling circuit is further configured to implement a frequency profile having, for each unit interval, only a single increasing-frequency subinterval and only a single decreasing-frequency subinterval.

3. A digital communications transmitter as claimed in claim 1 wherein said frequency-profiling circuit is further configured to implement a plurality of frequency profiles, wherein each frequency profile includes a plurality of digitally-specified frequencies for a unit interval.

4. A digital communications transmitter as claimed in claim 1 wherein said frequency-profiling circuit comprises a plurality of look-up tables, wherein each of said look-up tables is configured to produce a different frequency profile.

5. A digital communications transmitter as claimed in claim 4 wherein each digitally-modulated symbol selects one of said plurality of look-up tables.

6. A digital communications transmitter as claimed in claim 1 additionally comprising:

a constant-envelope amplifier coupled to said digital-to-analog converter; and

an antenna coupled to said constant-envelope amplifier.

7. A digital communications transmitter as claimed in claim 6 wherein said digital-processing circuit, said frequency-profiling circuit, said digital synthesizer, said digital-to-analog converter, and said constant-envelope amplifier are energized from a battery.

8. A digital communications transmitter as claimed in claim 1 wherein said digital-processing circuit has first and second clock domains which operate asynchronously from one another.

9. A digital communications transmitter as claimed in claim 8 wherein:

said first clock domain produces said digitally-modulated symbols at a data rate greater than one symbol per unit interval; and

said first clock domain occasionally operates in a standby mode until previously-generated symbols are output from said digital-processing circuit, wherein said standby mode causes said first clock domain to consume less power than is consumed when said first clock domain is not operated in said standby mode.

10. A digital communications transmitter as claimed in claim 8 wherein:

a memory is located in said digital-processing circuit at a boundary between said first and second clock domains;

said first clock domain causes said digitally-modulated symbols to be placed in said memory; and

said second clock domain uses direct memory access to extract said digitally-modulated symbols from said memory and supplies said digitally-modulated symbols to said frequency-profiling circuit.

11. A digital communications transmitter as claimed in claim 1 wherein:

said digital-processing circuit is formed on a first semiconductor substrate; and

said frequency-profiling circuit and said digital synthesizer are formed on a second semiconductor substrate which is different from said first semiconductor substrate.

12. A digital communications transmitter as claimed in claim 11 wherein said digital-to-analog converter is formed on said second semiconductor substrate.

13. A digital communications transmitter as claimed in claim 11 wherein:

said digital-processing circuit formed on said first semiconductor substrate has first and second clock domains which operate asynchronously from one another;

said second clock domain on said first semiconductor substrate operates synchronously with said frequency-profiling circuit and said digital synthesizer formed on said second semiconductor substrate; and

said second clock domain on said first semiconductor substrate provides an output port for said digital-processing circuit.

14. A digital communications transmitter as claimed in claim 11 wherein:

said digital-processing circuit formed on said first semiconductor substrate has first, second, and third clock domains;

said second clock domain provides a first serial port;

said third clock domain provides a second serial port; and

said digital communications transmitter additionally comprises a synchronizer coupled to said second and third clock domains of said digital-processing circuit, said synchronizer being configured to cause said third clock domain to operate synchronously with said second clock domain so that data collectively output by said first and second serial ports during each unit interval forms a symbol.

15. A digital communications transmitter as claimed in claim 14 wherein:

a first clock signal supplied to said second clock domain of said first semiconductor substrate is generated on said second semiconductor substrate; and

a second clock signal supplied to said third clock domain of said first semiconductor substrate is generated in said second clock domain of said first semiconductor substrate.

16. A digital communications transmitter as claimed in claim 1 wherein said digital-processing circuit is a programmable digital signal processor (DSP).

17. A digital communications transmitter as claimed in claim 16 wherein:

said programmable digital signal processor is configured to encode input data and to produce in-phase and quadrature baseband samples for each unit interval;

said programmable digital signal processor is configured to map said in-phase and quadrature baseband samples into a frequency-profile index for each unit interval; and

said programmable digital signal processor is configured to output said frequency-profile index for each unit interval as said digitally-modulated symbol.

18. A method of operating a digital communications transmitter comprising:

encoding input data so as to produce in-phase and quadrature baseband samples for a unit interval;

mapping said in-phase and quadrature baseband samples into a frequency-profile index;

selecting a frequency profile in response to said frequency-profile index, wherein said frequency profile specifies a plurality of frequencies in a predetermined sequence;

synthesizing a digital representation of a periodic signal throughout said unit interval in response to said frequency profile; and

converting said digital representation of said periodic signal into an analog signal.

19. A method as claimed in claim 18 additionally comprising:

providing circuits which perform said encoding and mapping activities on a first semiconductor substrate; and

providing circuits which perform said selecting and synthesizing activities on a second semiconductor substrate.

20. A method as claimed in claim 19 wherein:

said circuits which perform said encoding and mapping activities reside within a first clock domain on said first semiconductor substrate; and

said method additionally comprises transferring said frequency-profile index from said first semiconductor substrate to said second semiconductor substrate using a circuit which resides on said first semiconductor substrate within a second clock domain.

21. A method as claimed in claim 18 additionally comprising programming a frequency-profiling circuit to generate said frequency profile in response to said frequency-profile index.

22. A method as claimed in claim 21 wherein said programming activity is configured so that said frequency profile has only a single increasing-frequency subinterval and only a single decreasing-frequency subinterval.

23. A method as claimed in claim 18 additionally comprising programming a digital signal processor (DSP) to perform said encoding and mapping activities.

24. A method as claimed in claim 18 additionally comprising:

amplifying a signal derived from said analog signal in a constant-envelope amplifier to generate an amplified signal; and

broadcasting said amplified signal from an antenna.

25. A digital communications transmitter comprising:

a digital signal processor configured to encode input data so as to produce in-phase and quadrature baseband samples for each unit interval, to map said in-phase and quadrature baseband samples into a frequency-profile index for each unit interval, and to output said frequency-profile index for each unit interval;

a frequency-profiling circuit configured to generate a plurality of digitally-specified frequencies per unit interval in response to each frequency-profile index, said digitally-specified frequencies being configured to confine radio-frequency (RF) emissions within a predetermined spectral mask;

a digital synthesizer having a frequency input coupled to said frequency-profiling circuit and having a periodic output; and

a digital-to-analog converter having an input responsive to said periodic output of said digital synthesizer.

26. A digital communications transmitter as claimed in claim 25 wherein said frequency-profiling circuit, said digital synthesizer, and said digital-to-analog converter are formed on a common semiconductor substrate.

27. A digital communications transmitter as claimed in claim 25 wherein said frequency-profiling circuit is further configured to implement a plurality of frequency profiles, wherein each frequency profile specifies a plurality of frequencies in a predetermined sequence.