Wafer level package structure of optical-electronic device and method for making the same
First Claim
1. A wafer level package method for optical-electronic devices, comprising the steps of:
- providing a substrate, whose surfaces have a plurality of optical sensitive areas and a plurality of bonding pads, the bonding pads providing electrical communications from each optical sensitive area to the exterior;
providing a transparent layer, whose surfaces have a plurality of conductive circuits, each of which corresponds a bonding pad on the substrate;
connecting the substrate surfaces to the transparent layer surfaces, so that the bonding pads are connected to the conductive circuits;
dividing the substrate into a plurality of chips, each contains at least one optical sensitive area and corresponding bonding pad;
forming a protection layer on each of the chips and exposing part of the conductive circuit;
forming a conductive film on the protection layer, so that the conductive film is connected to the exposed conductive circuit; and
dicing the transparent layer to form a chip level semiconductor package unit.
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Accused Products
Abstract
A wafer level package structure of optical-electronic device and method for making the same are disclosed. The wafer level package structure of optical-electronic device is provided by employing a substrate whose surfaces have several optical sensitive areas and divided into individual package devices. The manufacture steps first involve providing a substrate with several chips whose surfaces have an optical sensitive area and bonding pads, and providing transparent layer whose surfaces have conductive circuits and scribe lines. Then the bonding pads bond to conductive circuits and a protection layer is formed on the chip to expose partly conductive circuits. Forming a conductive film on the protection layer and the conductive film contacts with the extending conductive circuits to form the wafer level package structure of optical-electronic device. At last, the transparent layer is diced according to scribe lines to form the individual package devices.
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Citations
11 Claims
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1. A wafer level package method for optical-electronic devices, comprising the steps of:
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providing a substrate, whose surfaces have a plurality of optical sensitive areas and a plurality of bonding pads, the bonding pads providing electrical communications from each optical sensitive area to the exterior;
providing a transparent layer, whose surfaces have a plurality of conductive circuits, each of which corresponds a bonding pad on the substrate;
connecting the substrate surfaces to the transparent layer surfaces, so that the bonding pads are connected to the conductive circuits;
dividing the substrate into a plurality of chips, each contains at least one optical sensitive area and corresponding bonding pad;
forming a protection layer on each of the chips and exposing part of the conductive circuit;
forming a conductive film on the protection layer, so that the conductive film is connected to the exposed conductive circuit; and
dicing the transparent layer to form a chip level semiconductor package unit. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A wafer level package structure for optical-electronic devices, comprising:
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a plurality of chips formed by dividing the substrate, each of which has surfaces with a plurality of optical sensitive areas and a plurality of bonding pads, the bonding pads providing electrical communication between the optical sensitive area and its exterior;
a transparent layer, whose surfaces have a plurality of conductive circuits and more than one scribe line, the substrate surface being connected to the transparent layer surface by connecting bonding pad to the conductive circuit, and the scribe line being determined according the position to each of said chips and said conductive circuits;
a protection layer, which is formed on transparent layer covering each of said chip and partially expose the conductive circuit on said transparent layer; and
a conductive film, which is formed on the protection layer and connected to the exposed conductive circuit of the transparent layer. - View Dependent Claims (8, 9, 10, 11)
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Specification