Methods and apparatuses for transient analyses of circuits

• US 20060031795A1
• Filed: 07/23/2004
• Published: 02/09/2006
• Est. Priority Date: 07/23/2004
• Status: Active Grant

• Current Assignee: Synopsys Incorporated
• Original Assignee: Synplicity, Inc. (Synopsys Incorporated)
• Inventors: McElvain, Kenneth S., Rahmat, Khalid
• Granted Patent: US 7,278,120 B2
• Time in Patent Office: Days
• US Class Current: 716/111
• CPC Class Codes: G06F 2119/06 Power analysis or power optimisation
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

Methods and apparatuses for transient analyses of a circuit using a hierarchical approach. In one embodiment, the cells are grouped locally on the power supply network according to average power dissipation. A time varying current of each cell group is estimated using a probabilistic approach to represent the cell group so that the probability of a more severe waveform for the current of the cell group is under a certain level. For example, the cells in a group are partitioned as switching cells and non-switching cells using cell toggle rates for the determination of the time varying current. The circuit model of the power supply network includes the current sources according to the estimated time varying currents for the cell groups, the power supply wire resistance, the power supply to ground wire capacitance, well capacitance and the de-coupling capacitance from non-switching cells.

Claims

1. A machine implemented method for circuit analysis, the method comprising:

grouping cells of a design of a circuit into cell groups according to a threshold for power dissipation; and

determining parameters specifying a time varying current, drawn by each of the cell groups from a power supply network of the circuit, for a transient analysis of the power supply network of the circuit.

2. The method of claim 1, further comprising:

performing the transient analysis of the power supply network of the circuit using the parameters specifying the time varying current determined for each of the cell groups.

3. The method of claim 1, wherein the cells of the design are grouped locally on the power supply network of the circuit.

4. The method of claim 3, wherein cells within each of the cell groups are contiguous on the power supply network of the circuit.

5. The method of claim 3, wherein the threshold for power dissipation specifies a limit of average power dissipation in each cell group.

6. The method of claim 3, wherein the design of the circuit comprises a gate level design;

and wherein the cells of the design comprise technology specific standard cells for implementing the circuit on an Integrated Circuit (IC) chip.

7. The method of claim 1, wherein at least one of the parameters specifying the time varying current is determined for each of the cell groups using data indicating probabilities of state switching at cells.

8. The method of claim 7, wherein, for at least one of the cell groups, the parameters specifying the time varying current are determined for a plurality of time intervals in a clock cycle using the data indicating probabilities of state switching at cells and data indicating timing windows for state switching.

9. The method of claim 8, wherein, for each of the plurality of time intervals, one or more parameters specifying the time varying current are determined from estimations of probability densities of state switching at cells based on the data indicating probabilities of state switching at cells and the data indicating timing windows for state switching.

10. The method of claim 9, wherein the probability densities are estimated as uniform distributions over the timing windows.

11. The method of claim 7, wherein the data indicating probabilities of state switching at cells comprise toggle rates of cells.

12. The method of claim 7, wherein said determining the parameters specifying the time varying current comprises:

estimating a switching current for each cell of each of the cell groups using data specifying energy dissipation at a corresponding cell during a state transition in a clock cycle; and

determining a number of first cells that switch in a same clock cycle for each of the cell groups using the data indicating probabilities of state switching at cells;

wherein the time varying current drawn by each of the cell groups includes at least switching currents for the number of the first cells that switch in a same clock cycle.

13. The method of claim 12, wherein the number of the first cells are determined for each of the cell groups such that a probability of more than the number of cells switching in a same clock cycle is less than a threshold value.

14. The method of claim 13, wherein the number of the first cells are determined for each of the cell groups to maximize a peak value of the time varying current while the probability of more than the number of cells switching in a same clock cycle is close to the threshold value.

15. The method of claim 13, wherein the threshold value is less than one.

16. The method of claim 13, further comprising:

determining, for each of the cell groups but excluding the number of the first cells, decoupling capacitance parameters of second cells for not switching;

wherein the transient analysis uses the decoupling capacitance parameters.

17. The method of claim 16, further comprising:

extracting resistance and capacitance parameters of the power supply network from the design of the circuit;

wherein the transient analysis further uses the resistance and capacitance parameters.

18. The method of claim 17, further comprising:

extracting well capacitance parameters of wells of cells from the design of the circuit;

wherein the transient analysis further uses the well capacitance parameters.

19. The method of claim 18, wherein the transient analysis is performed through solving a set of linear equations with a sparse matrix obtained from discretizing a set of ordinary differential equations based on current sources according to the time varying current for each of the cell groups, the resistance and capacitance parameters of the power supply network, the well capacitance parameters, and the decoupling capacitance parameters.

20. A machine implemented method for circuit analysis, the method comprising:

determining a representation of a first current, drawn by a group of cells from a power supplying network of a circuit in a clock cycle, using data indicating probabilities of state switching at the cells of the group, the representation of the first current specifying the first current as a non-constant function of time in a clock cycle.

21. The method of claim 20, wherein said determining the representation of the first current comprises:

determining a first number from the data indicating probabilities of state switching at the cells of the group such that a probability of more than the first number of cells of the group switching in a same clock cycle is about a predetermined value; and

selecting first cells of the first number from the group to determine the representation of the first current from currents drawn by the first number of the first cells when the first cells switch together in a same clock cycle.

22. The method of claim 21, wherein said determining the representation of the first current further comprises:

determining a representation of a second current, drawn by one of the cells of the group, the representation of the second current specifying the second current as a non-constant function of time in a clock cycle

23. The method of claim 22, wherein the representation of the second current is determined from an amount of energy dissipation in the one of the cells during switching in state in a clock cycle.

24. The method of claim 21, further comprising:

determining equivalent resistance and capacitance parameters for second cells of the group when the second cells do not switch, the second cells not including any of the first cells.

25. The method of claim 24, further comprising:

modeling the group of cells using at least a current source according to the representation of the first current and the equivalent resistance and capacitance parameters.

26. The method of claim 25, further comprising:

determining well capacitance parameters for the cells of the group;

wherein the group of cells is further modeled using the well capacitance parameters.

27. The method of claim 20, wherein the cells of the group comprise technology specific standard cells for implementing the circuit on an Integrated Circuit (IC) chip.

28. The method of claim 20, wherein the data indicating probabilities of state switching at the cells comprise toggle rates of the cells.

29. The method of claim 20, further comprising:

selecting cells of a design of the circuit into the group so that an average power dissipation of the group is at about a predetermined level.

30. A machine readable medium containing executable computer program instructions which when executed by a data processing system cause said system to perform a method for circuit analysis, the method comprising:

grouping cells of a design of a circuit into cell groups according to a threshold for power dissipation; and

determining parameters specifying a time varying current, drawn by each of the cell groups from a power supply network of the circuit, for a transient analysis of the power supply network of the circuit.

31. The medium of claim 30, wherein the method further comprises:

performing the transient analysis of the power supply network of the circuit using the parameters specifying the time varying current determined for each of the cell groups.

32. The medium of claim 30, wherein the cells of the design are grouped locally on the power supply network of the circuit.

33. The medium of claim 32, wherein cells within each of the cell groups are contiguous on the power supply network of the circuit.

34. The medium of claim 32, wherein the threshold for power dissipation specifies a limit of average power dissipation in each cell group.

35. The medium of claim 32, wherein the design of the circuit comprises a gate level design;

and wherein the cells of the design comprise technology specific standard cells for implementing the circuit on an Integrated Circuit (IC) chip.

36. The medium of claim 30, wherein at least one of the parameters specifying the time varying current is determined for each of the cell groups using data indicating probabilities of state switching at cells.

37. The medium of claim 36, wherein the data indicating probabilities of state switching at cells comprise toggle rates of cells.

38. The medium of claim 36, wherein said determining the parameters specifying the time varying current comprises:

estimating a switching current for each cell of each of the cell groups using data specifying energy dissipation at a corresponding cell during a state transition in a clock cycle; and

determining a number of first cells that switch in a same clock cycle for each of the cell groups using the data indicating probabilities of state switching at cells;

wherein the time varying current drawn by each of the cell groups includes at least switching currents for the number of the first cells that switch in a same clock cycle.

39. The medium of claim 38, wherein the number of the first cells are determined for each of the cell groups such that a probability of more than the number of cells switching in a same clock cycle is less than a threshold value.

40. The medium of claim 39, wherein the number of the first cells are determined for each of the cell groups to maximize a peak value of the time varying current while the probability of more than the number of cells switching in a same clock cycle is close to the threshold value.

41. The medium of claim 39, wherein the threshold value is less than one.

42. The medium of claim 39, wherein the method further comprises:

determining, for each of the cell groups but excluding the number of the first cells, decoupling capacitance parameters of second cells for not switching;

wherein the transient analysis uses the decoupling capacitance parameters.

43. The medium of claim 42, wherein the method further comprises:

extracting resistance and capacitance parameters of the power supply network from the design of the circuit;

wherein the transient analysis further uses the resistance and capacitance parameters.

44. The medium of claim 43, wherein the method further comprises:

extracting well capacitance parameters of wells of cells from the design of the circuit;

wherein the transient analysis further uses the well capacitance parameters.

45. The medium of claim 44, wherein the transient analysis is performed through solving a set of linear equations with a sparse matrix obtained from discretizing a set of ordinary differential equations based on current sources according to the time varying current for each of the cell groups, the resistance and capacitance parameters of the power supply network, the well capacitance parameters, and the decoupling capacitance parameters.

46. A machine readable medium containing executable computer program instructions which when executed by a data processing system cause said system to perform a method for circuit analysis, the method comprising:

determining a representation of a first current, drawn by a group of cells from a power supplying network of a circuit in a clock cycle, using data indicating probabilities of state switching at the cells of the group, the representation of the first current specifying the first current as a non-constant function of time in a clock cycle.

47. The medium of claim 46, wherein said determining the representation of the first current comprises:

determining a first number from the data indicating probabilities of state switching at the cells of the group such that a probability of more than the first number of cells of the group switching in a same clock cycle is about a predetermined value; and

selecting first cells of the first number from the group to determine the representation of the first current from currents drawn by the first number of the first cells when the first cells switch together in a same clock cycle.

48. The medium of claim 47, wherein said determining the representation of the first current further comprises:

determining a representation of a second current, drawn by one of the cells of the group, the representation of the second current specifying the second current as a non-constant function of time in a clock cycle

49. The medium of claim 48, wherein the representation of the second current is determined from an amount of energy dissipation in the one of the cells during switching in state in a clock cycle.

50. The medium of claim 47, wherein the method further comprises:

determining equivalent resistance and capacitance parameters for second cells of the group when the second cells do not switch, the second cells not including any of the first cells.

51. The medium of claim 50, wherein the method further comprises:

modeling the group of cells using at least a current source according to the representation of the first current and the equivalent resistance and capacitance parameters.

52. The medium of claim 51, wherein the method further comprises:

determining well capacitance parameters for the cells of the group;

wherein the group of cells is further modeled using the well capacitance parameters.

53. The medium of claim 46, wherein the cells of the group comprise technology specific standard cells for implementing the circuit on an Integrated Circuit (IC) chip.

54. The medium of claim 46, wherein the data indicating probabilities of state switching at the cells comprise toggle rates of the cells.

55. The medium of claim 46, wherein the method further comprises:

selecting cells of a design of the circuit into the group so that an average power dissipation of the group is at about a predetermined level.

56. A date processing system for circuit analysis, the data processing system comprising:

means for grouping cells of a design of a circuit into cell groups according to a threshold for power dissipation; and

means for determining parameters specifying a time varying current, drawn by each of the cell groups from a power supply network of the circuit, for a transient analysis of the power supply network of the circuit.

57. The data processing system of claim 56, further comprising:

means for performing the transient analysis of the power supply network of the circuit using the parameters specifying the time varying current determined for each of the cell groups.

58. The data processing system of claim 56, wherein the cells of the design are grouped locally on the power supply network of the circuit.

59. The data processing system of claim 58, wherein cells within each of the cell groups are contiguous on the power supply network of the circuit.

60. The data processing system of claim 58, wherein the threshold for power dissipation specifies a limit of average power dissipation in each cell group.

61. The data processing system of claim 58, wherein the design of the circuit comprises a gate level design;

and wherein the cells of the design comprise technology specific standard cells for implementing the circuit on an Integrated Circuit (IC) chip.

62. The data processing system of claim 56, wherein at least one of the parameters specifying the time varying current is determined for each of the cell groups using data indicating probabilities of state switching at cells.

63. The data processing system of claim 62, wherein the data indicating probabilities of state switching at cells comprise toggle rates of cells.

64. The data processing system of claim 62, wherein said means for determining the parameters specifying the time varying current comprises:

means for estimating a switching current for each cell of each of the cell groups using data specifying energy dissipation at a corresponding cell during a state transition in a clock cycle; and

means for determining a number of first cells that switch in a same clock cycle for each of the cell groups using the data indicating probabilities of state switching at cells;

wherein the time varying current drawn by each of the cell groups includes at least switching currents for the number of the first cells that switch in a same clock cycle.

65. The data processing system of claim 64, wherein the number of the first cells are determined for each of the cell groups such that a probability of more than the number of cells switching in a same clock cycle is less than a threshold value.

66. The data processing system of claim 65, wherein the number of the first cells are determined for each of the cell groups to maximize a peak value of the time varying current while the probability of more than the number of cells switching in a same clock cycle is close to the threshold value.

67. The data processing system of claim 65, wherein the threshold value is less than one.

68. The data processing system of claim 65, further comprising:

means for determining, for each of the cell groups but excluding the number of the first cells, decoupling capacitance parameters of second cells for not switching;

wherein the transient analysis uses the decoupling capacitance parameters.

69. The data processing system of claim 68, further comprising:

means for extracting resistance and capacitance parameters of the power supply network from the design of the circuit;

wherein the transient analysis further uses the resistance and capacitance parameters.

70. The data processing system of claim 69, further comprising:

means for extracting well capacitance parameters of wells of cells from the design of the circuit;

wherein the transient analysis further uses the well capacitance parameters.

71. The data processing system of claim 70, wherein the transient analysis is performed through solving a set of linear equations with a sparse matrix obtained from discretizing a set of ordinary differential equations based on current sources according to the time varying current for each of the cell groups, the resistance and capacitance parameters of the power supply network, the well capacitance parameters, and the decoupling capacitance parameters.

72. A date processing system for circuit analysis, the data processing system comprising:

means for determining a representation of a first current, drawn by a group of cells from a power supplying network of a circuit in a clock cycle, using data indicating probabilities of state switching at the cells of the group, the representation of the first current specifying the first current as a non-constant function of time in a clock cycle.

73. The data processing system of claim 72, wherein said means for determining the representation of the first current comprises:

means for determining a first number from the data indicating probabilities of state switching at the cells of the group such that a probability of more than the first number of cells of the group switching in a same clock cycle is about a predetermined value; and

means for selecting first cells of the first number from the group to determine the representation of the first current from currents drawn by the first number of the first cells when the first cells switch together in a same clock cycle.

74. The data processing system of claim 73, wherein said means for determining the representation of the first current further comprises:

means for determining a representation of a second current, drawn by one of the cells of the group, the representation of the second current specifying the second current as a non-constant function of time in a clock cycle

75. The data processing system of claim 74, wherein the representation of the second current is determined from an amount of energy dissipation in the one of the cells during switching in state in a clock cycle.

76. The data processing system of claim 73, further comprising:

means for determining equivalent resistance and capacitance parameters for second cells of the group when the second cells do not switch, the second cells not including any of the first cells.

77. The data processing system of claim 76, further comprising:

means for modeling the group of cells using at least a current source according to the representation of the first current and the equivalent resistance and capacitance parameters.

78. The data processing system of claim 77, further comprising:

means for determining well capacitance parameters for the cells of the group;

wherein the group of cells is further modeled using the well capacitance parameters.

79. The data processing system of claim 72, wherein the cells of the group comprise technology specific standard cells for implementing the circuit on an Integrated Circuit (IC) chip.

80. The data processing system of claim 72, wherein the data indicating probabilities of state switching at the cells comprise toggle rates of the cells.

81. The data processing system of claim 72, further comprising:

means for selecting cells of a design of the circuit into the group so that an average power dissipation of the group is at about a predetermined level.