High-reliability computer interface for wireless input devices

• US 20060035590A1
• Filed: 03/16/2005
• Published: 02/16/2006
• Est. Priority Date: 03/16/2004
• Status: Abandoned Application

• Current Assignee: Jaalaa, Inc.
• Original Assignee: Jaalaa, Inc.
• Inventors: Anandakumar, Krishnasamy, Singamsetty, Suresh Kumar, Morris, Martin George, Chung Kwan, Dennis Ching, Law, Hock Thye
• Application Number:
  US11/081,376
• Publication Number:
  US 20060035590A1
• Time in Patent Office: Days
• US Class Current: 455/41.200
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3215 Monitoring of peripheral devices
• CPC Class Codes: G06F 1/3237 by disabling clock generation or distribution
• CPC Class Codes: G06F 1/3259 Power saving in cursor control device, e.g. mouse, joystick, trackball
• CPC Class Codes: G06F 1/3271 Power saving in keyboard
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 2213/3814 Wireless link with a computer system port
• CPC Class Codes: G06F 3/0231 Cordless keyboards
• CPC Class Codes: G06F 3/03543 Mice or pucks G06F3/03541 takes precedence
• CPC Class Codes: G06F 3/038 Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
• CPC Class Codes: G06F 3/0383 Signal control means within the pointing device
• CPC Class Codes: H04W 52/04 TPC
• CPC Class Codes: H04W 52/28 using user profile, e.g. mobile speed, priority or network state, e.g. standby, idle or non transmission
• CPC Class Codes: H04W 52/287 when the channel is in stand-by
• CPC Class Codes: H04W 52/48 during retransmission after error or non-acknowledgment
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A computing system wherein communication between a host computer and peripheral units, e.g. computer mouse and keyboard, is performed using RF signals. The host computer and the peripheral units each contain a transceiver for managing and transmitting the RF communication messages. An acknowledgement is sent by the receiving transceiver to the sending transceiver to signify that the message was successfully received. If no acknowledgement is received by the sending transceiver, a subsequent RF communication message is sent until an acknowledgement is received. A sleep mode is invoked between messages to conserve battery power in the peripheral units, and the peripheral units send a report message to the host when awaking periodically, or by a user demand, from the sleep mode signifying that the peripheral unit is active and ready to send or receive messages.

Claims

1. A system for wireless communication to peripheral units, comprising:

a) a host computer containing a host transceiver unit;

b) a first peripheral unit containing a first wireless interface unit;

c) a second peripheral unit containing a second wireless interface unit;

d) said host computer communicates by a radio frequency (RF) communication with said first peripheral unit between said host transceiver unit and said first wireless interface unit and by said RF communication with said second peripheral unit between said host transceiver unit and said second wireless interface, whereby said host transceiver unit establishes a communication link with said first and second wireless interface units; and

e) said communication link uses a plurality of channels and a plurality of modes coupled with an acknowledgement message to successfully complete communication between said host computer and said first peripheral unit and between said host computer and said second peripheral unit.

2. The system of claim 1, wherein said host transceiver unit contains an EEPROM to store configuration options for each said wireless interface unit, and said communication options are communicated to said wireless interface units when said RF communication is established between said host transceiver and said first and second wireless interface units.

3. The system of claim 2, wherein said EEPROM is replaced by a resistor attached to a pin of a connector for said EEPROM to indicate that the EEPROM is not coupled to said host transceiver unit.

4. The system of claim 1, wherein said first and second peripheral units each contain a writeable non-volatile memory to store operational parameters.

5. The system of claim 4, wherein said writable non-volatile memory is replaced by a resistor connected to a mode pin of said first and second peripheral unit to indicate an out-of-box (OOB) mode.

15. The system of claim 1, further comprising layered wireless communication architecture:

a) a device interface layer coupled to said host computer;

b) a media access control layer coupled to said device interface layer; and

c) a physical layer, which interfaces with an antenna, coupled to said media access layer.

16. The system of claim 15, wherein the media access control layer controls access to and from said wireless interface units, and to enable data to be transferred between said device interface layer and said physical layer.

17. The system of claim 15, wherein said physical layer comprises registers and signals used to transfer between the physical layer and the media access control layer.

6. The system of claim I, said plurality of modes further comprises:

a) a sleep mode for conserving power of the peripheral units;

b) a wake-up mode for bringing the peripheral units out of a sleep mode;

c) a high data rate mode for communication between said host transceiver unit and said peripheral units;

d) a medium data rate mode for communicating between said host transceiver and said peripheral units;

e) a low data rate mode for communicating between said host transceiver unit and said peripheral units;

f) a spread mode for communicating between said host transceiver and said peripheral units.

g) an out-of-box mode for establishing communication between said host transceiver and said peripheral units in a system where a plurality of peripheral units are positioned close together; and

h) a dynamically paired mode for establishing communications between said host transceiver and a plurality of pairs of peripheral units.

7. The system of claim 6, wherein said sleep mode is used to power down said peripheral units, which are powered by batteries, to conserve power drain on the batteries when said peripheral units are inactive and not performing a function.

8. The system of claim 6, wherein said wake-up mode comprises procedures to re-establish communication between said host transceiver unit and said peripheral unit, which had previously been placed into said sleep mode.

9. The system of claim 6, wherein said high data rate mode is a default mode providing a high rate of communications between the host transceiver unit and said peripheral units.

10. The system of claim 6, wherein said medium data rate mode is used when there is strong interference with the communication between the host transceiver and the peripheral units caused by narrow band interference such as might result from a citizen band radio.

11. The system of claim 6, wherein said low data rate mode is used for European compliance purposes.

12. The system of claim 6, wherein said spread mode is used when there is interference from similar wireless device such as other transceivers and peripheral units.

13. The system of claim 6, wherein said out-of-box mode is determined at a time of manufacture and is intended for consumer use.

14. The system of claim 6, wherein said dynamically paired mode associates pairs of peripheral units such as a keyboard and a mouse in an environment where a plurality of said associated pairs of the peripheral units communicate with said host transceiver.

18. A computer system, comprising:

a) a host processing unit;

b) a plurality of peripheral units;

c) a radio frequency (RF) transceiver;

d) said RF transceiver contained within said host processing unit provides RF communication with said plurality of peripheral units, wherein each of said plurality of peripheral units contain said RF transceiver customized to operations of said each peripheral unit; and

e) said RF communication between said processing unit and said plurality of peripheral units performed bi-directionally to provide capability to send and receive data and receive acknowledgements.

19. The system of claim 18, wherein said plurality of peripheral units comprise a keyboard and a mouse.

20. The system of claim 18, wherein said RF transceiver of said host processing unit contains a plurality of computing functions coupled to a CPU bus in which said computing functions further comprise:

a) a read only memory (ROM);

b) a random access memory (RAM);

c) a modem;

d) a baseband hardware for formatting, encrypting and cyclical redundant checking data to be transmitted to said peripheral units;

e) a wake-up logic;

f) an input/output (I/O) unit programmable to couple said RF transceiver to a plurality of I/O communication protocols that are selectively used; and

g) an RF unit coupled to an antenna for communication to said peripheral units.

21. The system of claim 20, wherein said plurality of I/O communication protocols further comprise:

a) a general purpose input/output (GPIO);

b) an intelligent interface controller (I²C);

c) a universal asynchronous receiver/transmitter interface (UART);

d) a universal system bus (USB) interface; and

e) a bidirectional synchronous serial interface (PS/2).

22. A wireless keyboard, comprising:

a) a computer keyboard;

b) a radio frequency (RF) transceiver;

c) said RF transceiver contained within said computer keyboard providing RF communication with a host computer, wherein said RF transceiver customized to operations of said keyboard; and

d) said RF communication between said keyboard and said host computer performed bi-directionally to provide capability to send and receive data and receive acknowledgements.

23. The wireless keyboard of claim 22, wherein said RF transceiver contains a plurality of computing functions coupled to a bus in which said computing functions further comprise:

a) a CPU for controlling said RF transceiver;

b) a read only memory (ROM);

c) a random access memory (RAM);

d) a modem for connecting data to and from an RF unit;

e) a baseband hardware for formatting, encrypting and cyclical redundant checking data to be transmitted to said host computer;

f) a wake-up logic to bring said RF transceiver out of a low power sleep mode;

g) an input/output (I/O) unit programmable to couple said RF transceiver to a plurality of I/O communication protocols that are selectively used; and

h) said RF unit coupled to an antenna for communication to said host computer.

24. The wireless keyboard of claim 23, wherein said plurality of I/O communication protocols further comprise:

a) a general purpose input/output (GPIO);

b) an intelligent interface controller (I²C);

c) a universal asynchronous receiver/transmitter interface (UART); and

d) a keyboard interface for detecting key strokes from said computer keyboard and providing drive for LED'"'"'s used on said keyboard.

25. A wireless mouse, comprising:

a) a computer mouse;

b) a radio frequency (RF) transceiver;

c) said RF transceiver contained within said computer mouse providing RF communication with a host computer, wherein said RF transceiver customized to operations of said mouse; and

d) said RF communication between said mouse and said host computer performed bi-directionally to provide capability to send and receive data and receive acknowledgements.

26. The wireless mouse of claim 25, wherein said RF transceiver contains a plurality of computing functions coupled to a bus in which said computing functions further comprise:

a) a CPU for controlling said RF transceiver;

b) a read only memory (ROM);

c) a random access memory (RAM);

d) a modem for connecting data to and from an RF unit;

e) a baseband hardware for formatting, encrypting and cyclical redundant checking data to be transmitted to said host computer;

f) a wake-up logic to bring said RF transceiver out of a low power sleep mode;

g) a mouse scan to detect a button press, movement, or use of a scroll wheel;

h) an input/output (I/O) unit programmable to couple said RF transceiver to a plurality of I/O communication protocols that are selectively used; and

i) said RF unit coupled to an antenna for communication to said host computer.

27. The wireless mouse of claim 26, wherein said plurality of I/O communication protocols further comprise:

a) a general purpose input/output (GPIO);

b) an intelligent interface controller (I²C);

c) a universal asynchronous receiver/transmitter interface (UART); and

d) a mouse interface for position tracking and detecting key presses from said computer mouse.

28. The wireless mouse of claim 25, wherein said mouse is a mechanical mouse.

29. The wireless mouse of claim 25, wherein said mouse is an optical mouse and the optical sensor is turned off between movements of the mouse.