Software management systems and methods for automotive computing devices

• US 20060036805A1
• Filed: 10/06/2005
• Published: 02/16/2006
• Est. Priority Date: 12/20/2000
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Drasnin, Sharon, Radko, Ronald Otto, Beckert, Richard Dennis
• Granted Patent: US 7,051,160 B2
• Time in Patent Office: Days
• US Class Current: 711/104
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30
• CPC Class Codes: G06F 12/08 in hierarchically structured memory systems, e.g. virtual memory systems
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 12/122 of the least frequently used [LFU] type, e.g. with individual count value
• CPC Class Codes: G06F 2212/2022 Flash memory

Abstract

Methods and systems for operating automotive computing devices are described.

Claims

1. A system comprising:

an automotive computing device having a processor, volatile memory, non-volatile memory, and SRAM;

means for providing an object store for the computing device in the non-7 volatile memory;

means for maintaining one or more pages from the object store in the SRAM; and

means for providing pages from the SRAM into the non-volatile memory in a predetermined manner based upon the frequency that said pages are written to said non-volatile memory, wherein said frequency is tracked on a write count stored in an object store page table.

2. The system of claim 1, wherein said means for maintaining is configured to perform responsive to a detected power loss.

3. The system of claim 1 further comprising means for paging object store pages on demand into volatile memory.

4. The system of claim 1 further comprising means for writing one or more pages from volatile memory into SRAM.

5. The system of claim 4, wherein said means for writing comprises means for doing so responsive to accessing a page for the purpose of writing to the page.

6. The system of claim 1 further comprising means for writing one or more pages from volatile memory into a DRAM buffer allocated for that purpose.

7. The system of claim 1, wherein said means for providing the object store comprises means for copying the object store into the non-volatile memory on an initial boot up of the device.

8. The system of claim 1, wherein the non-volatile memory comprises flash memory.

9. The system of claim 1 further comprising means for maintaining the object store page table in SRAM, the object store page table providing data associated with the location of object store pages.

10. The system of claim 9 further comprising means for updating the object store page table in SRAM whenever an object store page is moved from one medium to another.

11. The system of claim 1 further comprising means for maintaining the object store page table in DRAM, the object store page table providing data associated with the location of object store pages.

12. The system of claim 1 further comprising means for battery-backing the SRAM in the event of a power loss.

13. In an automotive computing device having non-volatile storage that can contain a system object store and DRAM that can receive object store pages, a system comprising:

means for providing one or more object store pages from the DRAM into an SRAM or separate DRAM buffer, comprising part of the automotive computing device; and

means for providing one or more pages from the SRAM or DRAM buffer into the non-volatile storage in a predetermined manner based upon a frequency that said pages are written to said non-volatile storage, wherein said frequency is tracked on a write count stored in an object store page table.

14. The system of claim 13, wherein said means for providing comprise means for doing so using virtual addressing techniques.

15. The system of claim 13 further comprising means for paging object store pages from the non-volatile storage into DRAM responsive to a page being accessed.

16. The system of claim 15, wherein the non-volatile storage comprises flash memory.

17. The system of claim 15, wherein said paging comprises determining whether a page that is attempted to be accessed is already in DRAM or SRAM, and if not in either, paging it in from the non-volatile memory.

18. The system of claim 17 further comprising means for updating a translation look-aside buffer to contain a new mapping for a virtual address of at least one page that has been paged in.

19. The system of claim 13 further comprising means for maintaining the object store page table in the SRAM, or a region of the DRAM buffer that can be backed up to non volatile memory on shutdown, the object store page table maintaining information associated with the location of object store pages.

20. The system of claim 19 further comprising means for updating one or more entries in the object store page table responsive to said acts of providing.