Active matrix organic electroluminescent display device

• US 20060043371A1
• Filed: 10/08/2003
• Published: 03/02/2006
• Est. Priority Date: 10/18/2002
• Status: Active Grant

• Current Assignee: Beijing Xiaomi Mobile Software Co., Ltd. (Xiaomi Corp.)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Steer, William A
• Granted Patent: US 7,812,793 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2310/0259 with use of an analog or digital ramp generator in the column driver or in the pixel circuit
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/2018 by time modulation using two or more time intervals
• CPC Class Codes: G09G 3/2077 by a combination of two or more gradation control methods
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

An active matrix electroluminescent display device uses a stepped voltage waveform to the input of the pixel, the stepped voltage waveform being voltage-shifted by a previously stored pixel drive voltage before application to the gate of a drive transistor. The level of the voltage shift determines the duty cycle with which the display element is driven, and thereby controls the grey level output. The than the voltage width of linear operating region of the drive transistor, so that a selected step of the stepped waveform defines a transition from the drive transistor between fully on and fully off. In this way, the drive transistor is never driven in the linear region.

Claims

1. An active matrix electroluminescent display device comprising an array of display pixels (1), each pixel comprising:

an electroluminescent (EL) display element (2);

a drive transistor (22) for driving a current through the display element, a drive voltage being provided to the gate of the drive transistor (22); and

a storage capacitor (30) for storing a drive level and connected between an input (6) to the pixel and the gate of the drive transistor (22),

wherein driver circuitry is provided for providing a stepped voltage waveform to the input (6) of the pixel, the stepped voltage waveform being voltage-shifted by the storage capacitor (30) before application to the gate of the drive transistor (22), and wherein the height of the steps in the stepped voltage waveform is greater than the voltage width of the linear operating region of the drive transistor (22).

2. A device as claimed in claim 1, wherein the height of the steps in the stepped voltage waveform is sufficient to include the linear operating region voltages of the drive transistors of all pixels of the display.

3. A device as claimed in claim 1 or 2, wherein the drive level is selected to have one of a plurality of values, and is selected such that any gate voltage for the drive transistor in the linear region corresponds to a voltage between steps of the voltage applied to the gate of the drive transistor.

4. A device as claimed in any preceding claim, wherein each pixel further comprises an address transistor (32), connected between a power supply line (26) and the gate of the drive transistor (22).

5. A device as claimed in claim 4, wherein each pixel further comprises means for disabling the driving of current by the drive transistor (22) through the display element (2).

6. A device as claimed in claim 5, wherein the means for disabling comprises an isolating transistor (34) in series with the drive transistor (22) and the display element (2).

7. A device as claimed in claim 4, wherein the device further comprises disabling means comprising a switch for switching the voltage on one terminal of the display elements (2) of the array of pixels.

8. A device as claimed in claim 5, 6 or 7, wherein the device is operable in two modes:

a first mode in which a pixel voltage (42a) is applied to the input (6) to the pixel, the address transistor (32) is turned on, the disabling means is turned on to turn off the display element (2) and the storage capacitor (30) is charged to a level derived from the drive voltage (42a); and

a second mode in which the address transistor (32) is turned off, the disabling means is turned off and the stepped voltage waveform (42b) is applied to the input (6) of the pixel.

9. A device as claimed in any preceding claim, wherein the device is operable in at least two sequential phases, one phase (60) providing coarse resolution pulse width modulation and the other, shorter phase (62), providing fine resolution pulse width modulation.

10. A method of addressing an active matrix electroluminescent display device comprising an array of display pixels (1), each pixel comprising an electroluminescent (EL) display element (2), a drive transistor (22) for driving a current through the display element (2), a drive voltage being provided to the gate of the drive transistor (22), and a storage capacitor (30) for storing a drive level and connected between an input (6) to the pixel and the gate of the drive transistor (22), the method comprising, for each pixel:

storing a pixel drive voltage (46) on the storage capacitor (30);

providing a stepped voltage waveform (42b) to the input of the pixel (6), the stepped voltage waveform being voltage-shifted by the storage capacitor before application to the gate of the drive transistor, such that for a first set of the voltage steps applied to the gate of the drive transistor, the drive transistor is turned on, and for a second set of the voltage steps applied to the gate of the drive transistor, the drive transistor is turned off, the first and second sets being determined by the stored pixel drive level (46).

11. A method as claimed in claim 10, wherein the height of the steps in the stepped voltage waveform is greater than the voltage width of the linear operating region of the drive transistor.

12. A method as claimed in claim 11, wherein the height of the steps in the stepped voltage waveform is greater than the voltage width of the overlaid linear operating region voltages of the drive transistors of all pixels of the display.

13. A method as claimed in any one of claims 10 to 12, wherein the drive level is selected to have one of a plurality of values, and is selected such that any gate voltage for the drive transistor in the linear region corresponds to a voltage between steps of the voltage applied to the gate of the drive transistor.

14. A method as claimed in any one of claims 10 to 13, wherein the step of storing a pixel drive level (46) on the storage capacitor comprises turning on an address transistor (32) connected between a power supply line (26) and the gate of the drive transistor (22) and charging the storage capacitor (30) using the address transistor.

15. A method as claimed in claim 14, further comprising disabling the driving of current by the drive transistor through the display element during the storing of a pixel drive level on the storage capacitor.

16. A method as claimed in any one of claims 10 to 15, wherein the device is operable in at least two sequential phases, one phase (60) providing coarse resolution pulse width modulation and the other, shorter phase (62), providing fine resolution pulse width modulation.

17. A method as claimed in claim 16, wherein the stepped voltage waveform to the input of the pixel has the same voltage levels in the two phases (60, 62), and the shorter phase has shorter step transitions.